Abstract:Quadratic permutation polynomial (QPP) interleaver is more suitable for parallel turbo decoding due to it is contention-free. However, the parallel address generation of QPP is area-consuming when the parallel degree P is large, and the data shuffle between memory banks and processing elements (PE) introduces large interconnect cost. This paper first evaluates the area and power cost of three typical Parallel Address Generators (PAG) and four typical Data Shuffle Networks (DSN) from academic and industrial are… Show more
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