2010 International Conference on Computer Design and Applications 2010
DOI: 10.1109/iccda.2010.5541503
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A novel mutli-cores MCU architecture based on data flow computing

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Cited by 1 publication
(2 citation statements)
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“…3. ), detail presentation is in reference [3]. DFF is a novel architecture for the MCU and the architecture consists of PEs (called resources in the architecture) which can work simultaneously at the certain condition, an interconnection network-SWITCH which is a 6×6 on chip interconnect module utilizes scheduling algorithm iSLIP, and DFM (Fig.…”
Section: The Goals and Architecturementioning
confidence: 99%
See 1 more Smart Citation
“…3. ), detail presentation is in reference [3]. DFF is a novel architecture for the MCU and the architecture consists of PEs (called resources in the architecture) which can work simultaneously at the certain condition, an interconnection network-SWITCH which is a 6×6 on chip interconnect module utilizes scheduling algorithm iSLIP, and DFM (Fig.…”
Section: The Goals and Architecturementioning
confidence: 99%
“…Among them the multi-cores and data flow architecture are more suitable for parallel computing and low power consumption. Reference [3] introduces a kind of above architecture, and the architecture is called DFF (Data Flow driven on Function-level) which will be proposed as the target architecture of the ladder diagram to be compiled toward in the paper.…”
Section: Introductionmentioning
confidence: 99%