A Novel FPGA Accelerator Design for Real-Time and Ultra-Low Power Deep Convolutional Neural Networks Compared With Titan X GPU

Abstract

Convolutional neural networks (CNNs) based deep learning algorithms require high data flow and computational intensity. For real-time industrial applications, they need to overcome challenges such as high data bandwidth requirement and power consumption on hardware platforms. In this work, we have analyzed in detail the data dependency in the CNN accelerator and propose specific pipelined operations and data organized manner to design a high throughput CNN accelerator on FPGA. Besides, we have optimized the kernel operations to obtain a high power efficiency. The proposed CNN accelerator supports image classification and real-time object detection with high accuracy. The evaluation results show that our CNNbased FPGA accelerator can achieve 740 Giga operations per second (GOPS) at 200 MHz with kernel power of 12.2 watts on Intel Arria 10 FPGA. For object detection tasks, our system can achieve 105 fps with 56.5 mAP or 25 fps with 73.6 mAP on VOC dataset. Since we use the mixed fixed-point data representation, the detection accuracy is comparable with the GPU-based YOLO V2 framework. The power efficiency of our system is ∼ 3.3× better than Titan X GPU and ∼ 418× better than Intel E5-2620 V4 CPU.

Accelerated Diagnosis of Novel Coronavirus (COVID-19)—Computer Vision with Convolutional Neural Networks (CNNs)

“…The flexibility of the FPGA hardware is used to create a dynamic model generation system based on the dataset using different softcore processors. Further evidence of FPGA-based deep learning acceleration is reported in [11][12][13][14][15]. As stated in [11], the authors used an FPGA to increase the speed of stochastic gradient descent in matrix factorization operations.…”

“…The FPGA-based solution offered a 15.3× speed-up over the GPU implementation with a 60× less data dependency reduction. The work reported in [12][13][14][15] achieved greater performance in object detection inference [15] and a reduction in overall MAC operations per layer [14]. Alternatively, work performed in [12] uses an FPGA to handle the parallel context of echo data from received laser signals at high speed by using deep learning.…”

Cryptensor: A Resource-Shared Co-processor to Accelerate Convolutional Neural Network and Polynomial Convolution

“…Implementing CNN accelerator efficiently on FPGA is challenging, as most of the workload is focused in the heavy and repetitive convolution layers of CNN. Most recent works ( [28], [29], [30]) revolve around optimizing the CNN loop (Refer to Equation 1). Such techniques study the effect of unrolling at different loop level, loop tiling and loop interchanging.…”

An Energy-Efficient FPGA-based Convolutional Neural Network Implementation

“…Lenet, Alexnet and VGGNet are the most popular CNNs used in the FPGA implementation. However, the power consumptions, in general, are compared with either processor, GPU, or PC implementations, which is not a fair comparison [16], [18], [19]. Since FPGAs are inherently energy-efficient devices, a fair comparison should be done between FPGA implementations.…”