A Novel Fast Open-loop Phase Locking Scheme Based on Synchronous Reference Frame for Three-phase Non-ideal Power Grids

Abstract

Rapid and accurate phase synchronization is critical for the reliable control of grid-tied inverters. However, the commonly used software phase-locked loop methods do not always satisfy the need for high-speed and accurate phase synchronization under severe grid imbalance conditions. To address this problem, this study develops a novel open-loop phase locking scheme based on a synchronous reference frame. The proposed scheme is characterized by remarkable response speed, high accuracy, and easy implementation. It comprises three functional cascaded blocks: fast orthogonal signal generation block, fast fundamental-frequency positive sequence component construction block, and fast phase calculation block. The developed virtual orthogonal signal generation method in the first block, which is characterized by noise immunity and high accuracy, can effectively avoid approximation errors and noise amplification in a wide range of sampling frequencies. In the second block, which is the foundation for achieving fast phase synchronization within 3 ms, the fundamental-frequency positive sequence components of unsymmetrical grid voltages can be achieved with the developed orthogonal signal construction strategy and the symmetrical component method. The real-time grid phase can be consequently obtained in the third block, which is free from self-tuning closed-loop control and thus improves the dynamic performance of the proposed scheme. The proposed scheme is adaptive to severe unsymmetrical grid voltages with sudden changes in magnitude, phase, and/or frequency. Moreover, this scheme is able to eliminate phase errors induced by harmonics and random noise. The validity and utility of the proposed scheme are verified by the experimental results.

Energy Storage System Controller Design for Suppressing Electromechanical Oscillation of Power Systems

“…In view of the fact that the power angle of the SG is hard to measure, and the ESS with a PD controller cannot affect the system inertia when the power angle is fed back, the ESS with the feedback signal of rotor speed is adopted in this paper, as shown in Figure 2. U* dc is the rated value of the DC side voltage of the ESS, ω 0 is the rated rotor frequency, and the PLL of the grid phase detection module adopts the synchronous reference frame-based open-loop phase locking scheme (SRF-OLPL) [21,22].…”

“…Considering the constraints in (22), it can be known that in this period, the constraint of the D controller parameter K d given by (20) should satisfy:…”

Noise Immunity Analysis and Improvement of dq Frame Based Open-Loop Phase Detection Scheme

“…Delaying the sampling period to construct an orthogonal signal will result in high-frequency noise amplification, which thus further causes phase steady-state error [4]. In [10], the authors focus on the rapid phase detection of unbalanced grid voltage, which significantly improves the phase detection speed under complex conditions. However, while extracting the voltage-positive sequence components, random noise may still be amplified during the construction of the orthogonal voltage signal by delaying the sampling period or the first-order differentiating method [11].…”

“…However, high-frequency noise is a factor which cannot be ignored and will cause fluctuation changes in the voltage current magnitude and thus result in phase detection errors. A low-pass filter (LPF) is introduced as an effective solution to attenuate high-frequency random noise [9][10][11][12]. Reducing the filter bandwidth can effectively suppress noise; however, it will limit the dynamic performance of the control system at the same time, which leads to a longer system dynamic response time.…”

“…The paper is organized as follows. Section 2 presents the basic principle of the dq frame-based OPD scheme suggested in [9,10]. Section 3 establishes a detailed phase error analysis model to evaluate the noise immunity of OPD.…”