2007
DOI: 10.3923/jas.2007.3460.3468
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A Novel Design for Quantum-dot Cellular Automata Cells and Full Adders

Abstract: Quantum dot Cellular Automata (QCA) is a novel and potentially attractive technology for implementing computing architectures at the nanoscale. The basic Boolean primitive in QCA is the majority gate. In this paper we present a novel design for QCA cells and another possible and unconventional scheme for majority gates. By applying these items, the hardware requirements for a QCA design can be reduced and circuits can be simpler in level and gate counts. As an example, a 1-bit QCA adder is constructed by apply… Show more

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Cited by 83 publications
(9 citation statements)
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“…Figure 4. The structure of 1-bit full adder in, (a) [7] , (b) [8] , (c) [5] , (d) [9] According to the Equation ( 8), as demonstrated in Figure 4(b), another design of full adder consists of three majority gates and one inverters in Ref. [8] [8] .…”
Section: Overview Of Full Adder In Qcamentioning
confidence: 99%
See 1 more Smart Citation
“…Figure 4. The structure of 1-bit full adder in, (a) [7] , (b) [8] , (c) [5] , (d) [9] According to the Equation ( 8), as demonstrated in Figure 4(b), another design of full adder consists of three majority gates and one inverters in Ref. [8] [8] .…”
Section: Overview Of Full Adder In Qcamentioning
confidence: 99%
“…According to the Equation ( 10), a design of full adder was proposed in Ref. [9] [9] . As shown in Figure 4(d), this design consist of a three-input majority gate, one inverter, and an unconventional form of majority gate with five inputs.…”
Section: Overview Of Full Adder In Qcamentioning
confidence: 99%
“…For each bit of loss of information is given as KTln (2) by Launder in 1961, where K is Boltzmann constant and T is absolute temperature [6] The increase in power consumption is addressed by designing the system using reversible logic [7]. To achieve optimized performance, reversible logic is the recently proposed solution to design digital circuits using QCA [8][9][10][11][12][13][14][15]. Low power is promised by reversible logic because of no information loss and QCA committed for scaling beyond CMOS.…”
Section: Introductionmentioning
confidence: 99%
“…In [19][20][21], memory circuits have been proposed. In [22][23][24][25][26][27][28][29][30][31], reversible full adder (F-A)/substractor (F-S) and multiplier designs using a QCA reversible gate has been designed. In [32], a sequential circuits in multilayer QCA structure has been proposed.…”
Section: Introductionmentioning
confidence: 99%