A Novel Carrier-Overlapped PWM Method for Four-Level Neutral-Point Clamped Converters

Wang, Kui; Zheng, Zedong; Li, Yongdong

doi:10.1109/tpel.2018.2833148

Cited by 57 publications

(33 citation statements)

References 14 publications

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“…To achieve the voltage balancing of a four-level NPC converter, numerous research efforts have been made previously (e.g. [1]- [3], [5]- [9]). Generally, one approach to balance the capacitor voltages in multilevel converters is utilizing the redundant switching states within a phase leg (e.g.…”

Section: B Limitations Of the Existing Voltage-balancing Methodsmentioning

confidence: 99%

“…[6], [13], [14]. Following this principle, [5] proposed an special modulation technique to achieve the voltage balancing of the middle capacitor in a 4-level NPC converter. The approach in [5] results in utilizing three available output voltage levels in each switching window instead of two levels, for the purpose of voltage balancing.…”

Section: B Limitations Of the Existing Voltage-balancing Methodsmentioning

confidence: 99%

“…Following this principle, [5] proposed an special modulation technique to achieve the voltage balancing of the middle capacitor in a 4-level NPC converter. The approach in [5] results in utilizing three available output voltage levels in each switching window instead of two levels, for the purpose of voltage balancing. The authors stated that the control method is effective over the full modulation index, with a case of M = 0.9 confirmed in the experiment.…”

Section: B Limitations Of the Existing Voltage-balancing Methodsmentioning

confidence: 99%

“…To pull the ΔUC2 back to zero within one switching window, the desired average neutral point currents (reference direction defined in Fig. 1) need to satisfy the following equation [5]…”

Section: A Principlesmentioning

confidence: 99%

“…2. If the middle capacitor voltage is balanced, the two outer capacitor voltages can be naturally balanced over a fundamental cycle as analyzed in [5].…”

Section: Introductionmentioning

confidence: 99%

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Closed-loop DC-link Voltage Balancing Algorithm for a Four-level π-type Converter

Wang

Yuan

Jin

et al. 2019

IECON 2019 - 45th Annual Conference of the IEEE Industrial Electronics Society

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A four-level π-type converter is a Neutral Point Clamped (NPC) multilevel converter topology for low/medium voltage applications. As the inherent issue with this topology, the DC-link capacitor voltage balancing is challenging, especially when it operates as a single-end inverter/rectifier with unity power factor. This paper proposes a closed-loop DC-link voltage balancing algorithm of a π-type converter that is effective and simple to implement. In principle, this approach is based on Redundant Level Modulation (RLM). The RLM utilizes additional voltage levels in each switching window to gain extra controllability of the DC-link capacitor voltages without affecting the average output voltage. An algorithm based on mathematical and logical operations is developed to utilize RLM to achieve the closed-loop voltage balancing. The proposed control method is effective over the full modulation index (M = 0 ~ 1.15) and full power factor range (cos φ = 0 ~ 1). The algorithm is implemented in a test rig, and the experiment confirms its effectiveness.

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Section: B Limitations Of the Existing Voltage-balancing Methodsmentioning

confidence: 99%

Section: B Limitations Of the Existing Voltage-balancing Methodsmentioning

confidence: 99%

Section: B Limitations Of the Existing Voltage-balancing Methodsmentioning

confidence: 99%

“…To pull the ΔUC2 back to zero within one switching window, the desired average neutral point currents (reference direction defined in Fig. 1) need to satisfy the following equation [5]…”

Section: A Principlesmentioning

confidence: 99%

“…2. If the middle capacitor voltage is balanced, the two outer capacitor voltages can be naturally balanced over a fundamental cycle as analyzed in [5].…”

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

Closed-loop DC-link Voltage Balancing Algorithm for a Four-level π-type Converter

Wang

Yuan

Jin

et al. 2019

IECON 2019 - 45th Annual Conference of the IEEE Industrial Electronics Society

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Three‐phase cascaded neutral‐point‐clamped multilevel inverter

Qanbari

Nazarpour

2020

Int Trans Electr Energ Syst

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Summary This paper presents cascaded topology of three‐phase neutral‐point‐clamped converters (NPCC)s. Two or more NPCCs are cascaded in their AC sides through transformers. This multilevel inverter (MLI) is a transformer‐based single‐source inverter with trinary asymmetry. Compared with conventional and advanced diode‐clamped multilevel inverters, the proposed MLI achieves more levels on output voltage. From cost, number of components, volume, complexity and efficiency aspects, the proposed inverter is an optimized and advanced inverter. An individual space vector modulation (SVM) method has been developed for voltage control of the inverter. The neutral‐point voltage of the inverter is balanced conveniently by the SVM method. The proposed inverter is suitable for constant‐frequency applications. Simulation and experimental results of a 17‐kVA prototype verify the efficiency of the proposed arrangement.

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The voltage feedforward based pulse width modulation strategy under the fluctuated dc‐link voltage for a unidirectional five‐level ac motor drive system with open‐end winding connection

Cheng,

Zhao,

Wang

et al. 2023

Circuit Theory & Apps

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SummaryIn a unidirectional five‐level ac motor drive system with open‐end winding connection, because of the variation of operating frequency of ac motor, the instantaneous power fluctuation of rectifier stage and inverter stage will generate larger voltage ripple on each phase dc‐link capacitors, and further lead to a large amount of current harmonics in output currents of inverter. To cope with this problem, an improved space vector pulse width modulation (SVPWM) strategy based on dc‐link voltage feedforward is proposed. In this paper, the effects of zero sequence current harmonics caused by dc‐link voltage ripple on ac motor are firstly analyzed, including the stator winding flux linkage equation, voltage equation, and electromagnetic torque. Then, the generating mechanism of dc‐link voltage ripple and the current harmonics are discussed in detail in terms of instantaneous power fluctuation of each single‐phase converter. Based on this, an improved SVPWM strategy by modifying the modulation signal is proposed to suppress the generation of current harmonics. Finally, a 2.2 kW prototype experimental results are given, which verify the feasibility and advancement of the proposed modulation strategy.

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A Novel Carrier-Overlapped PWM Method for Four-Level Neutral-Point Clamped Converters

Cited by 57 publications

References 14 publications

Closed-loop DC-link Voltage Balancing Algorithm for a Four-level π-type Converter

Closed-loop DC-link Voltage Balancing Algorithm for a Four-level π-type Converter

Three‐phase cascaded neutral‐point‐clamped multilevel inverter

The voltage feedforward based pulse width modulation strategy under the fluctuated dc‐link voltage for a unidirectional five‐level ac motor drive system with open‐end winding connection

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