A novel approach to the design of a broadband high efficiency Class-E power amplifier with over 87% bandwidth

Tamjid, Farshid; Ghahremani, Ahmadreza; Richardson, Matthew; Fathy, Aly E.

doi:10.1109/pawr.2017.7875564

Cited by 19 publications

(8 citation statements)

References 10 publications

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“…Based on the equation of drain efficiency, some methods improving the efficiency of PA has been proposed. [2][3][4][5][6][7][8][9][10][11][12][13] The amplifiers of these methods should be divided into two categories: one is the switching-mode PA (SMPA), and the other is the harmonic tuned PA (HT-PA). Both PAs have made considerable progress in improving drain efficiency and have also been widely used.…”

Section: The Efficiency Of the Rf Pamentioning

confidence: 99%

“…The first major solution is a class E PA with parallel capacitors. [8][9][10][11][12][13] This solution has been widely used because of its two major advantages: simple circuit design and high-efficiency operation. Its matching network is shown in Figure 2, including a parallel capacitor, a series inductor and a series filter adjustable to the fundamental frequency to provide harmonic suppression.…”

Section: Problem Of Class E Amplifiersmentioning

confidence: 99%

“…Based on the equation of drain efficiency, some methods improving the efficiency of PA has been proposed 2–13 . The amplifiers of these methods should be divided into two categories: one is the switching‐mode PA (SMPA), and the other is the harmonic tuned PA (HT‐PA).…”

Section: Introductionmentioning

confidence: 99%

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A new harmonic tuned class E power amplifier based on waveform analysis

Yang

Luo

Xuan

et al. 2022

Circuit Theory & Apps

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In this paper, a waveform theory for harmonic tuned class E power amplifier (HT class E PA) based on waveform analysis is proposed. This paper uses the waveform theory of class F PAs and class F−1 PAs to solve the problem of harmonic tuning of traditional class E PAs. The equation of normalized current waveform of the class E PA is analyzed, set the phase difference between the current and voltage of the harmonic components to π2, and finally deduced the equation of normalized voltage waveform. This paper replaces the output impedance in the traditional class E PA design with the output impedance obtained from the waveform analysis, which makes the design of the matching network more convenient and ensures that the output current waveform and voltage waveform of the designed new HT class E PA are very close to those of the ideal class E power amplifier. The theoretical efficiency of the new HT class E PA is 89.04%. Based on this theory, a power amplifier is designed using a CREE GaN CGH40010F transistor. Test results show that: the gain can reach 10.7 dB, the output power is 40.7 dBm, PAE is 67.7%, DE is 74%.

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Section: The Efficiency Of the Rf Pamentioning

confidence: 99%

Section: Problem Of Class E Amplifiersmentioning

confidence: 99%

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A new harmonic tuned class E power amplifier based on waveform analysis

Yang

Luo

Xuan

et al. 2022

Circuit Theory & Apps

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“…Baluns are essential components for numerous applications such as antenna feed networks, differential mixers, high efficiency power amplifiers, differential amplifiers, and the conventional interface between unbalanced and balanced structures, etc 1‐3 . However, the design of a miniaturized balun that covers a wide frequency range is quite challenging, especially in the 300 MHz to 3 GHz band that is used for various applications like satellites, pagers, Wi‐Fi, Bluetooth, television broadcasting, and some mobile transmission bands.…”

Section: Introductionmentioning

confidence: 99%

A compact wideband balun design using double‐sided parallel strip lines with over 9:1 bandwidth

Tamjid

Thomas

Fathy

2020

Int J RF Microw Comput Aided Eng

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A simplified miniaturized wideband balun design covering (0.38-3.5 GHz) is presented. The broadband balun structure occupies a small area of 20.7 mm × 20.8 mm. The balun is designed using low loss double-sided parallel strip lines and is comprised of a two-stage Wilkinson divider followed by loading, symmetrically, the two output ports. One port with a phase inverter circuit; while a very similar but non-inverting circuit is placed in the other port for loading-balance compensation. To realize the balun's function, different smooth transitions have been employed and were accounted for. The fabricated balun circuit demonstrated phase and amplitude imbalance of less than ±5 and ± 0.4 dB, respectively, over the band.

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“…This is needed to achieve a near watt-level PA design for 2.4GHz while keeping the complexity at a manageable level. The difference in efficiency is largely due to parasitic effects mismatched during simulation and measurement [70]. The bondpads could also have been accounted for in the EM modelling using HFSS.…”

Section: Introductionmentioning

confidence: 99%

An approach for circuit design optimization based on complexity considerations

Tan¹

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Optimizing circuit trade-offs is a highly challenging task for any design team. This challenge is further exacerbated with the additional design complexity of integrating multiple circuits. Today, with the increasing demand for newer wireless communication products, design teams face a shorter time-to-market (TTM) for every generation of their new products and each product requires major improvement in wireless capability. Hence, it is important for the design teams to design circuits with complexity in mind. A design approach divided into architecture complexity, component complexity and discretional complexity are proposed. A novel benchmarking figure-of-merit, complexity factor (CF), was formulated and proposed for the architecture complexity. A simulated application of a goal, gain optimization, demonstrated and revealed that a reduction of up to 400% in the normalized complexity factor (NCF) could enhance the gain performance by approximately up to 40% for ultra-high frequency (UHF) applications. As the number of variables to be permuted is very high for the power amplifier (PA) blocks from circuit down to the process level, it is treated as a black box in the analysis but the next topology complexity step addressed this. A topology comparison was proposed between a 2-stacked EDNFET and SGNFET and a 4-stacked resistorladder SGNFET PA. Both of them achieved a near 20dBm output power and approximately 60% efficiency on the test-chips measurements, which demonstrated that the 2-stacked EDNFET and SGNFET topology with a reduction in stack height is a potential candidate for a reduced difficulty and complexity Doherty power amplifier (DPA) design. In the discretional complexity step, we explored the linearization of the DPA and proposed a DPA with a gm3 cancellation bias scheme tapping on its intrinsic linearization property, without adding external circuity to XII increase the complexity of the overall circuit but at the same time, improve its linearity by 6-8dB compared to a DPA optimized for power and more than 9dB compared with a balance PA with a similar structure. XIII

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A novel approach to the design of a broadband high efficiency Class-E power amplifier with over 87% bandwidth

Cited by 19 publications

References 10 publications

A new harmonic tuned class E power amplifier based on waveform analysis

A new harmonic tuned class E power amplifier based on waveform analysis

A compact wideband balun design using double‐sided parallel strip lines with over 9:1 bandwidth

An approach for circuit design optimization based on complexity considerations

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