A novel 4H‐SiC accumulation mode MOSFET with ultra‐low specific on‐resistance and improved reverse recovery capability

Abstract

A novel 1440‐V 4H‐SiC accumulation mode MOSFET (ACCUFET) with ultra‐low specific on‐resistance and improved reverse recovery performance is proposed in this article. As for the proposed SiC ACCUFET, the channel region can be completely depleted by the P‐type heavily doped polysilicon gate to build an electron barrier and realize a normally‐off device. And a Schottky barrier diode (SBD) is integrated below the trench gates on both sides, which brings the feasibility of realizing reverse conduction function of the proposed ACCUFET. Also, the p‐shield regions under the Schottky contact metal provide a good electric field shielding effect for the gate oxide. Compared with the conventional SiC trench MOSFET, the numerical simulation results show that the specific on‐resistance (Ron,sp) of the proposed ACCUFET is reduced by more than 64%. The high‐frequency figures‐of‐merit HFOM [Ron,sp × Cgd] and HFOM [Ron,sp × Qgd] of the proposed device are improved by 53.19% and 58.74%, respectively. The reverse recovery time (trr), and reverse recovery charge (Qrr) are reduced by 23.28% and 82.73%, respectively. In addition, the results also indicate that the proposed device has a better latch‐up immunity compared with the conventional SiC trench MOSFET. The excellent device performance and the simple manufacturing process provide a good prospect for the application of the proposed device.

Investigations of 4H‐SiC trench MOSFET with integrated high‐K deep trench and gate dielectric

“…Silicon carbide (SiC) material, known for its wide bandgap, high critical breakdown electric field strength and high thermal conductivity, replaces silicon as a new generation power semiconductor material [1–3]. The 4H‐SiC trench MOSFET (TMOS) has gained significant attention as an emerging power semiconductor device with advantages such as high breakdown voltage ( BV ), high current capacity, and fast switching speed, which made it widely employed in power‐integrated circuits [4–8].…”

Review of the SiC LDMOS power device

“…In the last two decades, continuous optimization of the device structure for SiC LDMOS power devices has been pursued, gradually achieving a favorable trade-off between breakdown voltage and R on,sp . Some papers have been published on topics related to crystal growth and process reviews [2,6,10,11] . While, this review primarily emphasizes the structural innovations and physical insights of the SiC LDMOS devices, highlighting efforts to enhance breakdown voltage and reduce R on,sp .…”