2022 IEEE International Memory Workshop (IMW) 2022
DOI: 10.1109/imw52921.2022.9779306
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A novel 3D 1T1R RRAM architecture for memory-centric Hyperdimensional Computing

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Cited by 2 publications
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“…Furthermore, in 3D integration, the construction of SL and BL on BEOL metallic layers as shown in Fig. 5 provides significant benefit [9,15]. Implementation of the N-gram encoder by the ReRAM CiM is shown in Fig.…”
Section: Hdc and Language Classificationmentioning
confidence: 99%
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“…Furthermore, in 3D integration, the construction of SL and BL on BEOL metallic layers as shown in Fig. 5 provides significant benefit [9,15]. Implementation of the N-gram encoder by the ReRAM CiM is shown in Fig.…”
Section: Hdc and Language Classificationmentioning
confidence: 99%
“…Typically, a HV consists of 1 bit × 10,000 dimensions. Almost all operations are bitwise operations, therefore HDC is suitable for parallel processing and Computation-in-Memory (CiM) [5][6][7][8][9][10][11]. CiM is one of the many parallel processing methods.…”
Section: Introductionmentioning
confidence: 99%
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