A New Unicast-Based Multicast Scheme for Network-on-Chip Router and Interconnect Testing

Abstract

3D technology for networks-on-chip (NOCs) becomes attractive. It is important to present an effective scheme for 3D stacked NOC router and interconnect testing. A new approach to testing of NOC routers is proposed by classifying the routers. Routers with the same number of input/output ports fall into the same class. Routers of the same class are identical if their tests are the same. A test packet is delivered to all the identical routers by a simple unicast-based multicast scheme. It is found that the depth of the consumption buffer at each router has great impact on the test delivery time because test application and test delivery for router testing cannot be handled concurrently. Test delivery must set a router to operational mode. A mathematical model is presented to evaluate the impact of consumption buffer depth on the test delivery time. A new and simple test application scheme is proposed for interconnect testing. Some interesting extensions are presented for further test time reduction and thermal considerations. Sufficient experimental results are presented by comparison with one previous method. The proposed method works for single stuck-at, transition, even small delay faults at routers, and single bridging faults at physical, consumption and injection channels.

Fault-Tolerant Spike Routing Algorithm and Architecture for Three Dimensional NoC-Based Neuromorphic Systems

“…This is because the spike routing method affects the load balance across the network and also the spike latency, as previously stated in Section I. In general, these works can be classified as unicast-based [40], path-based [41], and treebased [42]. A comparison between these methods is presented in [41].…”