A new topology for parallel resonant DC link with reduced peak voltage

Deshpande, V.V.; Doradla, S.R.

doi:10.1109/28.491478

Cited by 14 publications

(8 citation statements)

References 8 publications

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“…The RVRL topology is found to be quite satisfactory by providing smooth waveforms; the link frequency remains constant during clamping operation; there is no limitation of the resonant frequency; the device is of very low power rating; the additional inductor is 4.5 times smaller than [4], [5]. Thus, the RVRL topology is truly resonant and provides all the advantages.…”

Section: B Rvrlmentioning

confidence: 85%

“…As a result, the peak link voltage is reduced and the voltage stresses of inverter devices are correspondingly reduced. For and , the peak link voltage is reduced to instead of [4]. The waveforms of typical variables such as , , and are shown in Fig.…”

Section: A Acrlmentioning

confidence: 99%

“…• The clamping device adds to the cost and complexity of the resonant link. and are needed to stabilize the operation of the circuit [4]. The diode may be built monolithically with a switch in which case no separate external diode is required.…”

Section: A Acrlmentioning

confidence: 99%

“…In an attempt to reduce the peak voltage stresses without using clamping circuit, the basic PRDCL was modified with the addition of two more resonant components. Such a topology was well covered earlier [4], [5]. Since this topology reduces the peak stresses, it is hereafter referred to as reduced voltage resonant link (RVRL).…”

Section: Introductionmentioning

confidence: 99%

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A detailed study of losses in the reduced voltage resonant link inverter topology

Deshpande

Doradla

1998

IEEE Trans. Power Electron.

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A new reduced voltage resonant link (RVRL) topology was reported earlier. A detailed study of the effect of various parameters such as the characteristic impedance, Q factors, input dc voltage, and the resonant frequency on the link losses is presented. The voltage and current stresses on various link components are also given. The losses are determined and then compared with those of the actively clamped resonant dc link. The RVRL topology reduces the link losses by 25% under certain operating conditions. The new topology being truly resonant offers less EMI and requires less number of power devices. It is particularly suitable at high resonant frequencies with ease of control.

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Section: B Rvrlmentioning

confidence: 85%

Section: A Acrlmentioning

confidence: 99%

Section: A Acrlmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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A detailed study of losses in the reduced voltage resonant link inverter topology

Deshpande

Doradla

1998

IEEE Trans. Power Electron.

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“…SS techniques are formed by the circuits called snubber cells, and basically provide zero voltage switching (ZVS) and/or zero current switching (ZCS) for semiconductor devices. This SS concept has been very popular for the last 20 years and continues to be so [1][2][3][4][5][6][7][8][9][10][11][12][13][14][15]. Resonant techniques are used generally to provide soft switching in soft switching inverters (SSI).…”

Section: Introductionmentioning

confidence: 99%

A New Parallel Resonant DC Link for Soft Switching Inverters

Obdan

Bodur

Aksoy

et al. 2005

Electric Power Components and Systems

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In this article, a new parallel resonant DC link (PRDCL) that provides soft switching (SS) and pulse width modulated (PWM) operation for inverters is presented. The new PRDCL ensures zero crossings for a time period, and at any time required for SS and PWM operation of the inverters, respectively.Moreover, the proposed PRDCL is realized by using only one auxiliary active switch, has a simple structure and ease of control, and operates under SS conditions. All switches in the soft switching inverters (SSI) equipped with the new PRDCL operate with soft switching, and are subjected to no additional voltage and current stresses. A detailed steady-state analysis of the proposed PRDCL is presented, and this theoretical analysis is verified by a prototype of a 250 V, 50 kHz and 1250 W circuit.

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