A New Method to Measure the Jitter of a Signal

-This work presents the asynchronous sequential symbol synchronizers based on pulse comparison by positive transitions at half bit rate. Their performance will be compared with the reference asynchronous symbol synchronizers based on pulse comparison by both transitions at bit rate.For the reference and proposed variants, we consider two versions which are the manual (m) and the automatic (a).The objective is to study the four synchronizers and evaluate their output jitter UIRMS (Unit Interval Root Mean Square) versus input SNR (Signal Noise Ratio).

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“…For both, reference and proposed variant, we consider the versions manual (m) and automatic (a) [3,4,5,6,7].…”

Section: Introductionmentioning

confidence: 99%

Asynchronous sequential symbol synchronizers based on pulse comparison by positive transitions at half bit rate

Reis

Rocha

Gameiro

et al. 2014

2014 9th International Symposium on Communication Systems, Networks &Amp; Digital Sign (CSNDSP)

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“…The synchronizer recoveries the clock that is used to sample the data at the optimum point and retimes the bit duration of the data [1,2,3,4,5,6,7,8,9].…”

Section: Introductionmentioning

confidence: 99%

Deterministic and Random Phase Synchronizers

Reis

Rocha

Gameiro

et al. 2008

2008 the Third International Conference on Digital Telecommunications (Icdt 2008)

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1This work study two groups of synchronizers, namely the Deterministic Phase Synchronizer and the Random Phase Synchronizer. The difference between them is only inside of the phase comparator.In the first group, the VCO (Voltage Controlled Oscillator) synchronizes with the input deterministic phase of an expected periodic transition. In the second group the VCO synchronizes with the input random phase of an unexpected no periodic transition.Each group is studied under four topologies (analog, hybrid, combinational and sequential).The objective is to evaluate the two synchronizers groups with the four topologies and to observe their jitter behaviors with the noise.

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“…The pulse P1 (duration T/2) begins in the positive data transition delayed half period and finishes in the next negative data transition [1,2,3,4,5,6,7,8,9,10].…”

Section: Introductionmentioning

confidence: 99%

Effects of the previous pulse shift and filter on the symbol synchronizer PLL

Reis

Rocha

Gameiro

et al. 2008

2008 15th IEEE International Conference on Electronics, Circuits and Systems

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1We will study the effects of the shift of the previous pulse temporal position (between P1 and P2) on the symbol synchronizers jitter behavior.Each pulse temporal position (P1 and P2), with the same previous filter, forms a group with four different carrier PLL (Phase Lock Loop) namely the analog, hybrid, combinational and sequential.The main objective is to study the synchronizers output jitter UIRMS (Unit Interval Root Mean Squared) as function of the input SNR (Signal to Noise Ratio).

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A New Method to Measure the Jitter of a Signal

Cited by 11 publications

References 4 publications

Asynchronous sequential symbol synchronizers based on pulse comparison by positive transitions at half bit rate

Asynchronous sequential symbol synchronizers based on pulse comparison by positive transitions at half bit rate

Deterministic and Random Phase Synchronizers

Effects of the previous pulse shift and filter on the symbol synchronizer PLL

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