A New Error Correction Scheme for Physical Unclonable Function

Sun, Kai; Shen, Yulong; Lao, Yingjie; Zhang, Zaichen; You, Xiaohu; Zhang, Chuan

doi:10.1109/apccas.2018.8605707

Cited by 3 publications

(2 citation statements)

References 9 publications

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“…Integrating nanoscale technology into IoT design adds good authentication and secret key generation mechanisms with bits response rate error as the potential downside. Such errors are known to be resolved by error correction cryptographic systems such as syndrome-based schemes and code offset schemes, especially in Physical Unclonable Functions (PUFs) [21]. PUF security by design approach allows security to be introduced at the circuit level of IoT devices during the manufacturing process.…”

Section: Related Workmentioning

confidence: 99%

Industrial and Consumer Internet of Things: Cyber Security Considerations, Threat Landscape, and Countermeasure Opportunities

Ugwuanyi

Irvine

2021

2021 International Conference on Smart Applications, Communications and Networking (SmartNets)

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shown in Figure 1. IT and OT networks have the same Confidentiality, Integrity, and Availability (CIA) priority in the network/information security model but ranked in different priority order, IT -(CIA) and OT -(AIC) [6]. This implies that certain compromises have to be reached in some legacy OT use cases in prioritising safety and availability against security. An IT system may trade availability with security by shutting down systems in the event of cyber-attacks. In contrast, OT may trade availability with security when not connected to the internet. Industrial cybersecurity is the process of protecting Industrial Control Systems (ICS) from cyber-attacks. Industrial cyber threats could come from the inside or outside of an organisation and relate to industrial safety concerns for protecting critical infrastructure. Privacy and security are some of the most significant challenges for applying IoT in the industries. The types of security vulnerabilities recorded in generic IoT networks are increasingly seen in the industrial domains [5]. Notable examples include the Stuxnet discovered in 2010 by the VirusBlockAda that affected the Iranian uranium facility in 2014 [7], the Mirai botnet that affected millions of network routers and IP cameras in 2016 [8], the Distributed Denial of Service (DDoS) attack that took down the Finland heating system in 2016 [9], Brickerbot that leveraged the default password and user names on IoT devices in 2017 [10], and the 2021 Colonial Pipeline ransomware and data breach cyberattack that impacted computerised devices [11]. The security systems developed for consumer IoT networks cannot be directly deployed to industrial networks because of the differences in communication requirements. The communication requirements of Cyber-Physical Systems (CPS) and generic IoT is different and not clearly defined [1] but they are expected to handle data processing with higher levels of CIA. Similarly, emerging IoT innovations are enabling the successful convergence of IT and OT networks with no formal boundary [12].

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Section: Related Workmentioning

confidence: 99%

Industrial and Consumer Internet of Things: Cyber Security Considerations, Threat Landscape, and Countermeasure Opportunities

Ugwuanyi

Irvine

2021

2021 International Conference on Smart Applications, Communications and Networking (SmartNets)

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“…On the other hand, a post-processing method can be performed if reproducibility of existing PUF arrays is insufficient. In literature [2], [28], [29], error-correction techniques were implemented for PUF post-processing to revert PUF data, which intensified the PUF reproducibility with external storage. A trimming method implemented by data remanence-based technique was proposed in [30].…”

Section: Introductionmentioning

confidence: 99%

A Design of 2-Stage Voltage Ramp-Up SRAM Physical Unclonable Function

Song,

Liu,

Zhou

et al. 2024

Chinese J. Elect.

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Silicon physical unclonable function (PUF) implemented by static random access memory (SRAM) exists inherent demerit of unstable cells due to noise of environment and circuits, which significantly restricts its reproducibility. In this paper, a 16T SRAM cell with reset-delay circuit and a 2-stage voltage ramp up is fabricated and reported. Compared to conventional SRAM structure, each PUF cell adds a pair of pull-up PMOS (P-channel metal oxide semiconductor) and pull-down NMOS (N-channel metal oxide semiconductor) controlled by reset and delayedreset signals respectively, resulting in two positive feedback stages with different amplification coefficients when the voltage is ramped up. PUF array consists of 4064 cells, 322 dummy cells and a group of 8 series-connected inverters with an area of 304 μm × 650 μm to match the digital post-processing module. PUF test chip was fabricated in HH-Grace 110 nm platform with total area 1140 × 1140 μm 2 . The average HDintra (intra-chip Hamming distance, also bit error rate, BER) and HDinter (inter-chip Hamming distance) values of the 50 PUF chips in SOP16 package measured at normal point (1.5 V/25 ℃) were 1.92% and 49.85%, respectively.

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