A new de-embedding technique for on-board structures applied to the bandwidth measurement of packages

Hauwermeiren, L. Van; Botte, M.; Zutter, D. De

doi:10.1109/33.232056

Cited by 12 publications

(3 citation statements)

References 3 publications

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“…The S-matrix is composed of the self and coupled S-parameters of the N-port network, and the definition of the S-parameter in a network with an identical characteristic impedance is indicated in (4).…”

Section: Unmatched Load Condition Solved By Generalized S-parametersmentioning

confidence: 99%

“…If one desires to characterize such structures by S-parameter measurements, it is quite difficult to separate the actual part in which we are interested from its environment [4]. Normally, the device under test (DUT), which is widely seen as a part embedded in the test setup, is connected with certain types of test fixtures, whereas it is not connected directly to the calibrated reference plane of the vector network analyzer (VNA).…”

Section: Introductionmentioning

confidence: 99%

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A De-Embedding Technique of a Three-Port Network with Two Ports Coupled

Pu¹,

Kim²,

Nah³

2015

Journal of electromagnetic engineering and science

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A de-embedding method for multiport networks, especially for coupled odd interconnection lines, is presented in this paper. This method does not require a conversion from S-parameters to T-parameters, which is widely used in the de-embedding technique of multiport networks based on cascaded simple two-port relations, whereas here, we apply an operation to the S-matrix to generate all the uncoupled and coupled coefficients. The derivation of the method is based on the relations of incident and reflected waves between the input of the entire network and the input of the intrinsic device under test (DUT). The characteristics of the intrinsic DUT are eventually achieved and expressed as a function of the S-parameters of the whole network, which are easily obtained. The derived coefficients constitute ABCD-parameters for a convenient implementation of the method into cascaded multiport networks. A validation was performed based on a spice-like circuit simulator, and this verified the proposed method for both uncoupled and coupled cases. This is an Open-Access article distributed under the terms of the Creative Commons Attribution Non-Commercial License (http://creativecommons.org/licenses/ by-nc/3.0) which permits unrestricted non-commercial use, distribution, and reproduction in any medium, provided the original work is properly cited. ⓒ

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Section: Unmatched Load Condition Solved By Generalized S-parametersmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

A De-Embedding Technique of a Three-Port Network with Two Ports Coupled

Pu¹,

Kim²,

Nah³

2015

Journal of electromagnetic engineering and science

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“…To overcome the above-mentioned difficulties, it has become standard practice to characterize the effects of the test access ports, feeding lines, or adapters and then to separate them from the measurement relative to the complete structure: The remaining data are those associated to the electric behavior of the part (discontinuity) of interest. This procedure is known as de-embedding [4], [5], [6]. In recent years, a number of de-embedding methods have been reported in the literature and their references give useful hints for modeling [7], [8], [9], [10] and measurements [11], [12], [13], [14].…”

Section: Introductionmentioning

confidence: 99%

S-parameters characterization of through, blind, and buried via holes

Antonini

Scogna

Orlandi

2003

IEEE Trans. on Mobile Comput.

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A method for de-embedding the scattering parameters matrix for single-end or differential through, buried, and blind via holes in multilayer printed circuit board for high-speed digital applications is presented. The proposed technique starts from a measurement or simulation of the structure containing the discontinuity and, after the structure's partitioning, extracts the scattering parameters of the required discontinuity. The procedure is applied to different kinds of single-ended and differential via holes and is validated by measurements. The Finite Integration Technique is used to perform the needed three-dimensional electromagnetic simulations. Due to its reduced CPU time, the proposed methodology is suitable for a parametric analysis on the electrical performance of the via holes discontinuities and it gives useful results for the extraction of accurate computer-aided design models.

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RF/Wireless Packaging

Pinel

Tentzeris

Staicnlescu

et al. 2005

Encyclopedia of RF and Microwave Engineering

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The electronics packaging industry has proliferated to a point where its technology is at least equally—the semiconductor technology it is designed to serve. The increase in silicon complexity and integration has imposed demanding requirements on packaging technology for higher I/O counts, finer lead pitch, enhanced heat dissipation, and high‐speed, reliable interconnects. At the same time, the industry is also driving toward reduced printed‐circuit‐board area and complexity. From the traditional role of a protective mechanical enclosure, the modern package has been transformed into a sophisticated thermal and electrical management platform. Recent advances in high‐frequency packaging indicate a migration from wirebond (where the chip or die is interconnected to the package only on the periphery of the die) to flip‐chip (where the die is interconnected to the package using the entire die area); and from ceramic to organic packages, with cartridge and multichip technologies emerging as key form factors. The RF front‐end module is the core of the complex systems, and its integration poses a great challenge. Considering the characteristics of the RF modules, such as high performance up to 100 GHz; a large number of high‐performance discrete passive components, design flexibility, reconfigurable architecture, low power consumption, compactness, customized product, short time to market, and low cost, the system‐on package (SoP ) approach has emerged as the most effective means to provide a realistic integration solution as opposed to the system‐on‐chip (SoC ) solution. The strength of SoP is based on multilayer technololgy using low‐cost and high‐performance materials.

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A new de-embedding technique for on-board structures applied to the bandwidth measurement of packages

Cited by 12 publications

References 3 publications

A De-Embedding Technique of a Three-Port Network with Two Ports Coupled

A De-Embedding Technique of a Three-Port Network with Two Ports Coupled

S-parameters characterization of through, blind, and buried via holes

RF/Wireless Packaging

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