A new current-differencing single-supply operational amplifier

Frederiksen, T.M.; Davis, William F.; Zobel, D.W.

doi:10.1109/jssc.1971.1050202

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Principle Of Input Current-differencing1

Introduction1

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Cited by 12 publications

(2 citation statements)

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“…Input current-differencing technique was originally proposed in [7] for bipolar monolithic opamp design. As shown in Fig.…”

Section: Principle Of Input Current-differencingmentioning

confidence: 99%

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Sleep-mode ready, area efficient capacitor-free low-dropout regulator with input current-differencing

Liu

Ismail

2009

Analog Integr Circ Sig Process

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This paper proposes an input current-differencing technique in designing a capacitor-free low-dropout regulator to simultaneously achieve sleep-mode efficiency and silicon real estate saving. With no minimum output current required to be stable, the regulator could greatly improve SoC efficiency during standby, which is extremely attractive for battery powered applications. Designed in TSMC 0.18-lm CMOS technology, it regulates 1.8-1.2 V supply down to 1 V with 100 mA maximum output current and can drive up to 100 pF of load parasitic capacitance. Compared with prior arts with the same sleep-mode compatibility and similar output current range, it reduces the on-chip compensation capacitance from 21 to 4.5 pF.

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“…Input current-differencing technique was originally proposed in [7] for bipolar monolithic opamp design. As shown in Fig.…”

Section: Principle Of Input Current-differencingmentioning

confidence: 99%

“…The CD stage is a CMOS version of [7], also widely used in analog signal processing and frequency filtering [8]. The LDO is internally compensated by MOSFET capacitance C M and C cf of 4 pF and 500 fF, respectively.…”

Section: Introductionmentioning

confidence: 99%