A New Construction of Minimum Distance Robust Codes

Rabii, Hila; Keren, Osnat

doi:10.1007/978-3-319-66278-7_23

Cited by 8 publications

(8 citation statements)

References 11 publications

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“…Here, E a denotes the set of errors which are always detected (refer Figure 2 Let e z 1 represents the error present in the information part of a code word, and e ωðz 1 Þ denotes the error present in the redundant part of a code word. Hence, an error e in the binary Galois field is defined as e ¼ e z 1 ; 7,32]. Thus, the error masking equation for C is given in Equation (3).…”

Section: Fsm Security Through State Assignmentmentioning

confidence: 99%

SD‐SHO: Security‐dominated finite state machine state assignment technique with a satisfactory level of hardware optimization

Das

Panchanathan

2021

IET Computers & Digital Tech

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Recently, the finite state machine (FSM)-based digital controllers are susceptible to faultinjection and side-channel attacks, which makes FSM security a more prominent factor. FSM optimality is another crucial element when designed. A state encoding approach is applied for FSM security and optimization. This article proposes the security-dominated FSM state assignment technique (SD-SHO), which obtains a satisfactory level of FSM optimization as well. It is a deterministic algorithm and consists of two key techniques, such as state assignment using an improved quadratic sum code, and state assignment using a gradient-based interior point method. A fuzzy bi-level programming logic is introduced in the proposed approach for regulating the constituting algorithms optimally. Experiments are conducted to evaluate the FSM security and optimality using the MCNC FSM benchmarks. Results indicate a substantial reduction in the error masking probability using SD-SHO. It also demonstrates that SD-SHO achieves a satisfactory level of area and power reduction compared with other existing works.This is an open access article under the terms of the Creative Commons Attribution License, which permits use, distribution and reproduction in any medium, provided the original work is properly cited.

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Section: Fsm Security Through State Assignmentmentioning

confidence: 99%

SD‐SHO: Security‐dominated finite state machine state assignment technique with a satisfactory level of hardware optimization

Das

Panchanathan

2021

IET Computers & Digital Tech

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“…In a recent paper Rabii and Keren introduced a construction for a new class of nonlinear robust q-ary codes with q = 2 m and error correction capability [26]. The code is built upon systematic linear codes [n, k, d] q where the n−k redundant symbols that were originally allocated to increase the minimum distance of the code, are modified to provide both correction capability and robustness.…”

Section: Definition 3 (Partially Robust Codes)mentioning

confidence: 99%

“…In this paper, we consider and optimize architectures that are designed to handle natural and malicious faults. The architectures are based on a recent code construction, the Rabii-Keren (RK) codes [26] in their generalized form [27].…”

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confidence: 99%

Error control scheme for malicious and natural faults in cryptographic modules

2020

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Today’s electronic systems must simultaneously fulfill strict requirements on security and reliability. In particular, their cryptographic modules are exposed to faults, which can be due to natural failures (e.g., radiation or electromagnetic noise) or malicious fault-injection attacks. We present an architecture based on a new class of error-detecting codes that combine robustness properties with a minimal distance. The new architecture guarantees (with some probability) the detection of faults injected by an intelligent and strategic adversary who can precisely control the disturbance. At the same time it supports automatic correction of low-multiplicity faults. To this end, we discuss an efficient technique to correct single nibble/byte errors while avoiding full syndrome analysis. We also examine a Compact Protection Code (CPC)-based system level fault manager that considers this code an inner code (and the CPC as its outer code). We report experimental results obtained by physical fault injection on the SAKURA-G FPGA board. The experimental results reconfirm the assumption that faults may cause an arbitrary number of bit flips. They indicate that a combined inner–outer coding scheme can significantly reduce the number of fault events that go undetected due to erroneous corrections of the inner code.

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“…In a recent paper Rabii and Keren introduced a construction for a new class of non-linear robust q-ary codes with q = 2 m and error correction capability [22]. The RK codes have higher code rate than concatenated codes, and at the same time, they are more effective [23].…”

Section: Definition 2 (Robust Codes)mentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Detection and Correction of Malicious and Natural Faults in Cryptographic Modules

Karp

Keren

Polian

Kalpa Publications in Computing

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Today's electronic systems must simultaneously fulfill strict requirements on security and reliability. In particular, their cryptographic modules are exposed to faults, which can be due to natural failures (e.g., radiation or electromagnetic noise) or malicious faultinjection attacks. We present an architecture based on a new class of error-detecting codes that combine robustness properties with a minimal distance. The new architecture guarantees (with some probability) the detection of faults injected by an intelligent and strategic adversary who can precisely control the disturbance. At the same time it supports automatic correction of low-multiplicity faults. To this end, we discuss an efficient technique to correct single errors while avoiding full syndrome analysis. We report experimental results obtained by physical fault injection on the SAKURA-G FPGA board.

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A New Construction of Minimum Distance Robust Codes

Cited by 8 publications

References 11 publications

SD‐SHO: Security‐dominated finite state machine state assignment technique with a satisfactory level of hardware optimization

SD‐SHO: Security‐dominated finite state machine state assignment technique with a satisfactory level of hardware optimization

Error control scheme for malicious and natural faults in cryptographic modules

Detection and Correction of Malicious and Natural Faults in Cryptographic Modules

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