A new compilation technique for SIMD code generation across basic block boundaries

Tanaka, M.; Ota, Jun; Matsumoto, Tadahiko; Hieda,; Takéuchi,; Imai,

doi:10.1109/aspdac.2010.5419911

Cited by 5 publications

(5 citation statements)

References 9 publications

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“…Owing to their balanced combination of flexibility and hardware performance, digital signal processors (DSPs) have been more and more adopted in sensor‐based systems [1]. Large numbers of works have already been announced in many different application domains.…”

Section: Introductionmentioning

confidence: 99%

“…However, a major problem with SIMD instructions is the missing support by C compilers [5]. Although SIMD instructions are commonplace in modern microprocessors, generation of SIMD code from programs written in high‐level language is still a difficult task for current compilers [1]. Standard code generation techniques are not capable of detecting opportunities for SIMD instructions because of a limited exploration of the search space.…”

Section: Introductionmentioning

confidence: 99%

“…Although usual arithmetic operation instructions perform just one operation, SIMD parallelism offers significant potential to speed up signal processing [2]. So, making good use of SIMD instructions leads to significantly higher performance than the program without SIMD instructions [1].…”

Section: Introductionmentioning

confidence: 99%

“…Although some practical compilers [6, 7] support automatic SIMD code generation to use SIMD instructions as an optimisation option, they often does not work well on vectorisable programs [1].…”

Section: Introductionmentioning

confidence: 99%

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Single instruction multiple data code auto generation for a very long instruction words digital signal processor in sensor‐based systems

Yang

Zhang

Liu

et al. 2013

IET wirel. sens. syst.

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The emerging applications have imposed strong requirements, such as high processing capacity, low-power consumption, reduced size and many others, on the sensor-based systems. Owing to their balanced combination of flexibility and hardware performance, digital signal processors (DSPs) have become more and more popular used in sensor-based systems. Many DSPs have adopted very long instruction words (VLIW) style architecture, for its ability to greatly enhance instruction level parallelism. However, as VLIW codes are statically scheduled, the behaviour of VLIW architecture is dominated by the efficiency of its compiler. Single instruction multiple data (SIMD) instructions, which perform multiple operations in parallel on multiple data packed in registers, have been widely used in DSPs to meet the requirements of sensor-based systems. Although hand programming still yields the best performing SIMD codes, it is both time consuming and error prone. Advanced compiler techniques to automatically generate SIMD instructions, are under urgent demand. In this study, the authors proposed an SIMD code auto generation approach for VLIW architecture. It recognises candidates of operations in the intermediate representation, evaluates the possibility of grouping them into SIMD code, reconstructs the verified ones according to the cost model and finally generates the SIMD code. The authors have implemented this approach in the compiler of a VLIW DSP named Magnolia, which is designed for sensor-based systems. The results show that the authors' approach is very efficient, and can largely enhance the performance.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Single instruction multiple data code auto generation for a very long instruction words digital signal processor in sensor‐based systems

Yang

Zhang

Liu

et al. 2013

IET wirel. sens. syst.

View full text Add to dashboard Cite

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“…They emit select instructions to perform the selection based on the control predicates. The other code generation technique is vectorizing data flow in each basic block individually, and then maintains data dependency of variables for SIMD operations by inserting assignment statements for the variables [19]. Programs with control flow can be vectorized without modifying control flow structure.…”

Section: Related Workmentioning

confidence: 99%

Insufficient Vectorization: A New Method to Exploit Superword Level Parallelism

Gao¹,

Lin²,

Zhao³

et al. 2017

IEICE Trans. Inf. & Syst.

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SUMMARYSingle-instruction multiple-data (SIMD) extension provides an energy-efficient platform to scale the performance of media and scientific applications while still retaining post-programmability. However, the major challenge is to translate the parallel resources of the SIMD hardware into real application performance. Currently, all the slots in the vector register are used when compilers exploit SIMD parallelism of programs, which can be called sufficient vectorization. Sufficient vectorization means all the data in the vector register is valid. Because all the slots which vector register provides must be used, the chances of vectorizing programs with low SIMD parallelism are abandoned by sufficient vectorization method. In addition, the speedup obtained by full use of vector register sometimes is not as great as that obtained by partial use. Specifically, the length of vector register provided by SIMD extension becomes longer, sufficient vectorization method cannot exploit the SIMD parallelism of programs completely. Therefore, insufficient vectorization method is proposed, which refer to partial use of vector register. First, the adaptation scene of insufficient vectorization is analyzed. Second, the methods of computing inter-iteration and intra-iteration SIMD parallelism for loops are put forward. Furthermore, according to the relationship between the parallelism and vector factor a method is established to make the choice of vectorization method, in order to vectorize programs as well as possible. Finally, code generation strategy for insufficient vectorization is presented. Benchmark test results show that insufficient vectorization method vectorized more programs than sufficient vectorization method by 107.5% and the performance achieved by insufficient vectorization method is 12.1% higher than that achieved by sufficient vectorization method. key words: SIMD extension, SIMD parallelism, vector register, insufficient vectorization

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