A New Compact Spice-like Model of E2PROM Memory Cells Suitable for DC and Transient Simulations

SILC effects on E/sup 2/PROM memory cell reliability

“…2(a) shows the simulated trend of the FN tunnel current flowing across the tunnel oxide during the erase of the E PROM cell considered. As is known, on decreasing the control gate (CG) voltage ramp rate, the peak value of the tunnel current reduces because the increase of FG voltage induced by the capacitive coupling with the CG is more efficiently compensated by the electron injection in the FG [7]. The amount of charge exchanged to program/erase the memory device, , can be determined by either integrating , or simply applying , where is the difference between program and erase threshold voltages, and is the capacitance between CG and FG.…”

“…To study the effect of SILC on retention and endurance of E PROM memories, we have employed the new compact model Manuscript proposed in [7], [8]. This model uses a new FG calculation procedure improving significantly the E PROM modeling quality, and it can be easily extended to include SILC.…”

“…For this reason, the current density flowing across the oxide, , which acts as stress current for E PROM cells, and the charge exchanged during P/E operations have been calculated from E PROM simulations, taking advantage of the excellent fitting capabilities of the model [7], [8]. Fig.…”

“…To accomplish this task, we will use the new model of floating-gate (FG) memory cells proposed in [7], [8], which has been extended to include SILC by incorporating the empirical law proposed in [9] (see Section II). By means of this model, which allows to reproduce not only the DC and transient behavior of the E PROM memories, but also their aging, we will analyze accurately the impact of SILC in enhancing read disturbs and worsening the retention properties of E PROM memories (see Section III).…”