A New CMOS Programmable Gain Amplifier with a DC-offset Cancellation Circuit

Abstract

Abstract. In this paper, we present a new low-power Programmable Gain Amplifier (PGA) with a DC-offset cancellation to reduce chip area, cost and power. The PGA adjusts 8-level gains from 4dB to 60dB using the 8 CMOS switches and 16 passive resistors in parallel, and DC-offset circuit is based on a Miller effect technique. It is fabricated using Magnachip/SK Hynix 0.18-μm CMOS 1poly-6metal process. The proposed system showed excellent gain error of less than 0.24dB, very small die area of 0.015mm 2 and low power consumption of 1.137mW.