Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537)
DOI: 10.1109/date.2000.840294
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A new approach for computation of timing jitter in phase locked loops

Abstract: A new method for computation of timing jitter in a PLL is proposed. The computational method is based on the representation of the circuit as a linear time-varying system with modulated stationary noise models, spectral decomposition of stochastic process and decomposition of noise into orthogonal components i. e. phase and amplitude noise. The method is illustrated by examples of jitter computation in PLLs.Eyt () 2

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“…The using of substitution y(o, t) z(o1, t)e1(1t and solving the obtained equation (10) C(t)±(,, 1) + (G(t) +jo,C(t))z(o1, t) + as((oi, t) = 0 (10) with respect to envelope cot, t) avoids this problem. The known integration techniques can be applied to solve (10).…”
Section: Methodsmentioning
confidence: 89%
“…The using of substitution y(o, t) z(o1, t)e1(1t and solving the obtained equation (10) C(t)±(,, 1) + (G(t) +jo,C(t))z(o1, t) + as((oi, t) = 0 (10) with respect to envelope cot, t) avoids this problem. The known integration techniques can be applied to solve (10).…”
Section: Methodsmentioning
confidence: 89%