A new 2.5D TSV package assembly approach

Abstract

Just in few years, three-dimensional (3D) packaging technologies have attracted much more attention. With emergence of through-silicon via (TSV) technology, siliconbased device integrations, the TSV's, have become the main stream of 3D packaging technologies. TSV's can be further classified as 2.5D and 3D TSV's. For 2.5D TSV package assembly, since multiple components involved, there are normally two assembly process approaches, i.e., from "Topto-Bottom" (TOB), or from "Bottom-to-Top (BOT). Each approach has its own pros and cons. From stress minimization aspect, TOB is more desirable. But from packaging assembly easiness viewpoint, BOT is more practical and thus has been mainly utilized. To overcome these dilemmas occurred in 2.5D TSV package assembly, a new assembly process approach, called new TOB (n-TOB), has been developed. Instead of bonding the chip onto the interposer, the n-TOB starts out with precisely bonding the interposer onto the chip with using a specially-designed eccentric-axis pickup tip which also effectively protects the flip chip C4 bumps on the interposer backside during bonding. Finite-element (FE) simulation and reliability tests were employed to assess the effectiveness and impact of this new assembly approach on 2.5D TSV packages. The assessment results show that n-TOB is feasible with at least the same performance in both package assembly and reliability.

Heterogeneous 2.5D integration on through silicon interposer

“…Examples are: using ceramic substrate, 85 using TCB for flip chip attach, 86 and using specially design pick up tool. 87 The effect of underfill and warpage on package stress and reliability is also been reported. [88][89][90] …”