A Neuron- and a Synapse Chip for Artificial Neural Networks

Lansner, John A.; Lehmann, Torsten

doi:10.1109/esscirc.1992.5468235

Cited by 3 publications

(1 citation statement)

References 7 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…In fact, the original neuromorphic definition by Carver Mead referred to analog circuits that operated in subthreshold mode [1]. There are a large variety of other neuromorphic analog implementations [7], [8], [12], [14], [17]- [19], [99], [100], [323], [324], [326]- [329], [331]- [333], [335]- [372], [374]- [387], [516], [571], [572], [578]- [580], [594]- [603], [606]- [610], [612]- [614], [620]- [640], [642]- [646], [648]- [653], [655]- [664], [666]- [683], [685]- [699], [701]- [703], [705]- [719], [722]- …”

Section: A High-levelmentioning

confidence: 99%

A Survey of Neuromorphic Computing and Neural Networks in Hardware

Schuman¹,

Potok²,

Patton³

et al. 2017

Preprint

172

180

View full text Add to dashboard Cite

Neuromorphic computing has come to refer to a variety of brain-inspired computers, devices, and models that contrast the pervasive von Neumann computer architecture. This biologically inspired approach has created highly connected synthetic neurons and synapses that can be used to model neuroscience theories as well as solve challenging machine learning problems. The promise of the technology is to create a brainlike ability to learn and adapt, but the technical challenges are significant, starting with an accurate neuroscience model of how the brain works, to finding materials and engineering breakthroughs to build devices to support these models, to creating a programming framework so the systems can learn, to creating applications with brain-like capabilities. In this work, we provide a comprehensive survey of the research and motivations for neuromorphic computing over its history. We begin with a 35-year review of the motivations and drivers of neuromorphic computing, then look at the major research areas of the field, which we define as neuro-inspired models, algorithms and learning approaches, hardware and devices, supporting systems, and finally applications. We conclude with a broad discussion on the major research topics that need to be addressed in the coming years to see the promise of neuromorphic computing fulfilled. The goals of this work are to provide an exhaustive review of the research conducted in neuromorphic computing since the inception of the term, and to motivate further work by illuminating gaps in the field where new research is needed.

show abstract

Section: A High-levelmentioning

confidence: 99%

A Survey of Neuromorphic Computing and Neural Networks in Hardware

Schuman¹,

Potok²,

Patton³

et al. 2017

Preprint

172

180

View full text Add to dashboard Cite

show abstract

Unipolar Input Signals in Single-Layer Feed-Forward Neural Networks

Annema

1995

Feed-Forward Neural Networks

View full text Add to dashboard Cite

Reply to 'Comments on 'Linearization Techniques for Nth-Order Sensor Models in MOS VLSI technology''

Ismail

1993

IEEE Trans. Circuits Syst. II

View full text Add to dashboard Cite

a system (1) with interconnections restricted to local neighborhoods of radius r by employing these basic patterns. The resulting system will automatically "remember" all possible combinations of the basic modules, including the 50 commonly used Chinese characters mentioned above (by Theorem 2).In the modified CNN design procedure, taking k = 2 in step 2) and I 4 -i = -10 x Ornz x Vi2 in step 8), where Om, = (1.". . l ) E S,,, we design a CNN of form (1) with neighborhood radius r = 3 which stores ol.. . . .a" as memory vectors. This system has 2601 total interconnections, while using a fully interconnected neural network with n = 81, we require a total of 6561 interconnections. For the present example, by using a CNN, we have reduced the total number of required interconnections to less than 40%.One of the typical evolution results for oZ7 = a' + 0114 + CY'' 1s ' depicted in Fig. 3. The noisy initial pattern shown in the upper left corner of Fig. 3 is generated by adding to n2' zero-mean Gaussian noise with a standard deviation SD = 1. The evolution continues from left to right in each row and from the top row to the bottom row. The key pattern aZ7 is recovered in 24 steps with step size k = 0.227 in a digital simulation of (I), using MATLAB on a Sun SPARC Station.Simulation results also show that all the vectors corresponding to the aforementioned 50 commonly used Chinese characters are and m, = RI X 771% reachable memory vectors of the synthesized CNN. REFERENCES L. 0. Chua and T. Roska, "Stability of a class of nonreciprocal cellular neural networks," IEEE Trans.Contrary to common practice, the above comments' were not made available to us for reply prior to publication. We would like to think that this was an oversight. In the following, we provide our reply.The four-transistor MOS transconductor presented in [ 13 provides the most general description of the circuit concept in question. A nonlinearity cancellation condition relating the gate voltages of the four transistors was developed together with general conditions on transistors drain-source voltages for proper triode region operation. We then show that the independent works of Song [2], Rubin [3], Ryan-Haigh [4], and the author of the comments are special cases of the general description provided in [l]. Our general approach was adopted in the text by Unbehauen and Cichocki [5] to describe the curcuit and its special cases. This approach shows that while MOS circuits may look topologically identical, they could exhibit extremely different behaviors under different operating conditions. More recently [6], we show that complete nonlinearity cancellation in the circuit occurs when all four transistors operate in saturation or when the cross-coupled pair operates in triode (saturation) while the other pair operates in saturation (triode). In all these cases, the circuit topology is the same, which leads us to argue that the origin of the circuit really goes back to the four-transistor chopper multiplier [7] which is topologically identical (see [7, figs. ...

show abstract

A Neuron- and a Synapse Chip for Artificial Neural Networks

Cited by 3 publications

References 7 publications

A Survey of Neuromorphic Computing and Neural Networks in Hardware

A Survey of Neuromorphic Computing and Neural Networks in Hardware

Unipolar Input Signals in Single-Layer Feed-Forward Neural Networks

Reply to 'Comments on 'Linearization Techniques for Nth-Order Sensor Models in MOS VLSI technology''

Contact Info

Product

Resources

About