A nano-scale design of a multiply-accumulate unit for digital signal processing based on quantum computing

Ahmadpour, Seyed-Sajad; Navimipour, Nima Jafari; Yalcin, Senay; Bakhshayeshi Avval, Danial; Ain, Noor Ul

doi:10.1007/s11082-023-05604-z

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A nano-scale design of a multiply-accumulate unit for digital signal processing based on quantum computing

Cited by 4 publications

References 64 publications

Efficient Design of Half-Adders and EXOR Gates for Energy-Efficient Quantum Computing with Delay Analysis Using Quantum-Dot Cellular Automata Technology

Efficient Design of Half-Adders and EXOR Gates for Energy-Efficient Quantum Computing with Delay Analysis Using Quantum-Dot Cellular Automata Technology

A novel energy efficient 4-bit vedic multiplier using modified GDI approach at 32 nm technology

Design and implementation of a nano-scale high-speed multiplier for signal processing applications

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