A nano-ampere current reference circuit and its temperature dependence control by using temperature characteristics of carrier mobilities

Hirose, Takahisa; Osaki, Yuji; Kuroki, Nobutaka; Numa, Masahiro

doi:10.1109/esscirc.2010.5619819

Cited by 80 publications

(22 citation statements)

References 10 publications

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“…Generating a current source smaller than 10 nA is another challenge, as the conventional structure such as a Wilson current source is not suitable here. To create the ultra-low current source, the structure presented in [2] is used to generate a 4-nA current source. Figure 7 shows the schematic of the presented ultra-low current source.…”

Section: Ultra-low-power Bandgap Reference and Nano-ampere Biasmentioning

confidence: 99%

An Ultra-Low-Power Integrated RF Energy Harvesting System in 65-nm CMOS Process

Liu

et al. 2015

Circuits Syst Signal Process

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In recent years, radio frequency (RF) energy harvesting systems have gained significant interest as inexhaustible replacements for traditional batteries in RF identification and wireless sensor network nodes. This paper presents an ultra-low-power integrated RF energy harvesting circuit in a SMIC 65-nm standard CMOS process. The presented circuit mainly consists of an impedance-matching network, a 10-stage rectifier with order-2 threshold compensation and an ultra-low-power power manager unit (PMU). The PMU consists of a voltage sensor, a voltage limiter and a capacitor-less low-dropout regulator. In the charge mode, the power consumption of the proposed energy harvesting circuit is only 97 nA, and the RF input power can be as low as −21.4 dBm (7.24 µW). In the burst mode, the device can supply a 1.0-V DC output voltage with a maximum 10-mA load current. The simulated results demonstrate that B Lian-xi Liu adam79416@126.com; Circuits Syst Signal Process the modified RF rectifier can obtain a maximum efficiency of 12 % with a 915-MHz RF input. The circuit can operate over a temperature range from −40 to 125 • C which exceeds the achievable temperature performance of previous RF energy harvesters in standard CMOS process.

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Section: Ultra-low-power Bandgap Reference and Nano-ampere Biasmentioning

confidence: 99%

An Ultra-Low-Power Integrated RF Energy Harvesting System in 65-nm CMOS Process

Liu

et al. 2015

Circuits Syst Signal Process

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“…Some of these circuits operate at a supply voltage greater than 1 V [1][2][3][4][5][6][7][8][9][10][11], whereas others have been found to operate at a supply voltage lower than 1 V [12][13][14][15][16][17]. Circuits with reference currents of only several nano-amperes have also been reported [6,11,12].…”

Section: Introductionmentioning

confidence: 99%

“…As the demand for efficient lowpower circuits has significantly increased in recent times owing to the demand for long-lasting batteries in handheld devices, low-voltage current reference circuits have been investigated [1][2][3][4][5][6][7][8][9][10][11][12][13][14][15][16][17]. Some of these circuits operate at a supply voltage greater than 1 V [1][2][3][4][5][6][7][8][9][10][11], whereas others have been found to operate at a supply voltage lower than 1 V [12][13][14][15][16][17]. Circuits with reference currents of only several nano-amperes have also been reported [6,11,12].…”

Section: Introductionmentioning

confidence: 99%

A 0.6-V 2-nA CMOS Current Reference Circuit

Qin¹

2017

IJERA

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This paper proposes a 0.6-V current reference circuit for use in ultra-low-power applications. In a conventional resistorlessbeta-multiplier current reference circuit, a MOSFET that operates in the strong inversion and triode regions is used as a resistor. Our proposed circuit provides a forward body-biasing for the MOSFET to lower its threshold voltage and make it operate in its strong inversion region even at a very low supply voltage of 0.6 V.We ran simulations using BSIM3v3 SPICE parameters for a 0.18-m standard CMOS process. At a supply voltage of 0.6V, the reference current was 2nA. The chip area of the proposed current reference circuit was 0.022 mm 2 .

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“…This is a critical problem to design high capability amplifier with low power consumption. Several solutions are proposed to cope with the issues in (Torfifard and A'ain, 2013;Lopez-Martin et al, 2005;Ueno et al, 2009;Hirose et al, 2010;Choi et al, 2012).…”

Section: Introductionmentioning

confidence: 99%

Adaptive Biasing Low Power Amplifier Using CMOS Technology

Ghamsari¹,

Pirmoradia²

2015

J. of Applied Sciences

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A B S T R A C T In this study, an adaptive biasing CMOS operational amplifier is presented which operates at 3 V power supply and simulated at 180 and 90 nm technologies. The adaptive biasing current circuit controls the input voltages and supplies the amplifier with biasing current in order to achieving stability and optimum power consumption at higher speed. The circuit is simulated in Hspice software environment and the performance results demonstrate that the amplifier with the ABCC can operate with low power and achieve high speed of 0.012 V/us at the time rise and 0.011 V/us at fall time when the input pulse frequency and the amplitude are 1 kHz and 1.3 V peak to peak, respectively. The gain and phase margin are 35 dB and 62° at 90 nm technology, respectively.

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A nano-ampere current reference circuit and its temperature dependence control by using temperature characteristics of carrier mobilities

Cited by 80 publications

References 10 publications

An Ultra-Low-Power Integrated RF Energy Harvesting System in 65-nm CMOS Process

An Ultra-Low-Power Integrated RF Energy Harvesting System in 65-nm CMOS Process

A 0.6-V 2-nA CMOS Current Reference Circuit

Adaptive Biasing Low Power Amplifier Using CMOS Technology

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