A multi-standard DSL central office modem SoC

Abstract

can be independently configured for a different standard. To maximize flexibility and performance, the chip is designed with leading edge general purpose and fixed function processing elements that are efficiently linked using a central switch and DMA. This SoC offers unprecedented signal processing performance by integrating 5,928Million C-programmable MACs/sec and 6,547Million configurable DSP-accelerator (DSPA) MACs/sec. The C-programmable elements were implemented using three DSP cores each running at 494MHz. The chip contains over 107 million transistors and is implemented in 0.13µm CMOS technology with 6-layer copper metallization. The full chip dissipates 2.7 W in ADSL2+ mode at room temperature.