A Multi-scale Binarized Neural Network Application Based on All Programmable System on Chip

Xiang, Maoyang; Teo, T. Hui

doi:10.1109/mcsoc51149.2021.00030

2021 IEEE 14th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip (MCSoC) 2021

DOI: 10.1109/mcsoc51149.2021.00030

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A Multi-scale Binarized Neural Network Application Based on All Programmable System on Chip

Maoyang Xiang

T. Hui Teo

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Implementation of Binarized Neural Networks in All-Programmable System-on-Chip Platforms

Xiang¹,

Teo²

2022

Electronics

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The Binarized Neural Network (BNN) is a Convolutional Neural Network (CNN) consisting of binary weights and activation rather than real-value weights. Smaller models are used, allowing for inference effectively on mobile or embedded devices with limited power and computing capabilities. Nevertheless, binarization results in lower-entropy feature maps and gradient vanishing, which leads to a loss in accuracy compared to real-value networks. Previous research has addressed these issues with various approaches. However, those approaches significantly increase the algorithm’s time and space complexity, which puts a heavy burden on those embedded devices. Therefore, a novel approach for BNN implementation on embedded systems with multi-scale BNN topology is proposed in this paper, from two optimization perspectives: hardware structure and BNN topology, that retains more low-level features throughout the feed-forward process with few operations. Experiments on the CIFAR-10 dataset indicate that the proposed method outperforms a number of current BNN designs in terms of efficiency and accuracy. Additionally, the proposed BNN was implemented on the All Programmable System on Chip (APSoC) with 4.4 W power consumption using the hardware accelerator.

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Implementation of Binarized Neural Networks in All-Programmable System-on-Chip Platforms

Xiang¹,

Teo²

2022

Electronics

View full text Add to dashboard Cite

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A Multi-scale Binarized Neural Network Application Based on All Programmable System on Chip

Cited by 1 publication

References 14 publications

Implementation of Binarized Neural Networks in All-Programmable System-on-Chip Platforms

Implementation of Binarized Neural Networks in All-Programmable System-on-Chip Platforms

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