A Multi-Resolution FPGA-Based Architecture for Real-Time Edge and Corner Detection

Possa, Paulo Da Cunha; Mahmoudi, Sidi Ahmed; Harb, Naim; Valderrama, Carlos; Manneback, Pierre

doi:10.1109/tc.2013.130

Cited by 87 publications

(48 citation statements)

References 26 publications

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“…Furthermore, the power consumption is not considered in their work, and we believe that the GPU power consumption is also high. To compare SpiNNaker 103 power consumption with that of other platforms we refer to the work by Possa et al [11]. They also use three different platforms: CPU, GPU, and FPGA.…”

Section: Evaluation and Discussionmentioning

confidence: 99%

“…The two kernels represent derivative approximations: G x for horizontal changes, and G y for vertical ones. These two kernels are as follows [11]:…”

Section: Image Smoothing and Edge Detectionmentioning

confidence: 99%

“…We used a Gaussian filter with a 5 x 5 kernel size and σ = 1.0. The discretized form of this Gaussian kernel is as follows [11]: …”

Section: Image Smoothing and Edge Detectionmentioning

confidence: 99%

See 2 more Smart Citations

High performance computing on SpiNNaker neuromorphic platform: A case study for energy efficient image processing

Sugiarto

Liu

Davidson

et al. 2016

2016 IEEE 35th International Performance Computing and Communications Conference (IPCCC)

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Abstract-This paper presents an efficient strategy to implement parallel and distributed computing for image processing on a neuromorphic platform. We use SpiNNaker, a manycore neuromorphic platform inspired by neural connectivity in the brain, to achieve fast response and low power consumption. Our proposed method is based on fault-tolerant finegrained parallelism that uses SpiNNaker resources optimally for process pipelining and decoupling. We demonstrate that our method can achieve a performance of up to 49.7 MP/J for Sobel edge detector, and can process 1600 x 1200 pixel images at 697 fps. Using simulated Canny edge detector, our method can achieve a performance of up to 21.4 MP/J. Moreover, the framework can be extended further by using larger SpiNNaker machines. This will be very useful for applications such as energy-aware and time-critical-mission robotics as well as very high resolution computer vision systems.

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Section: Evaluation and Discussionmentioning

confidence: 99%

“…The two kernels represent derivative approximations: G x for horizontal changes, and G y for vertical ones. These two kernels are as follows [11]:…”

Section: Image Smoothing and Edge Detectionmentioning

confidence: 99%

See 1 more Smart Citation

High performance computing on SpiNNaker neuromorphic platform: A case study for energy efficient image processing

Sugiarto

Liu

Davidson

et al. 2016

2016 IEEE 35th International Performance Computing and Communications Conference (IPCCC)

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show abstract

“…The use of FPGA technology brings with it greater advantages. This work using FPGA technology is low cost and fast compared to other methods [17][18][19][20]. Thus, the proposed method is more advantageous than the other methods.…”

Section: Introductionmentioning

confidence: 98%

A Fault Diagnosis Approach for Rail Surface Anomalies Using FPGA in Railways

Yaman

Karaköse

Akın

2017

ijamec

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Railway transport is a widely used means of transportation for passenger and cargo transportation. In recent years, more emphasis has been placed on railway transport. With the development of high-speed trains, it has become important for passenger transport. Due to the heavy construction of the train, continuous failures occur in the railway line. Various methods of inspection are available to detect these failures. In case of early fault detection and repair of major accidents can be prevented. In this study, an FPGA based method is proposed for rail surface inspection and fault diagnosis. The proposed method is realized by image processing with FPGA. The image is taken on the railway line with the camera attached to the FPGA development board. Pre-processing is performed on the obtained image. Edge extraction is applied to the image after pre-processing. The rail surface is detected using the image obtained as a result of edge extraction. The proposed method works in real time to monitor and diagnose faults. It detects many defects on the track surface. In addition, the proposed method measures the size of the fault on the rail surface. In this study, FPGA based condition monitoring device was developed. An architecture has been developed for implementing the proposed method with FPGA. This work using FPGA technology is low cost and fast compared to other methods. The proposed method is quite advantageous because of its realtime operation.

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“…Field Programmable Gate Arrays (FPGAs) have gained increasing popularity in many domains, including consumer electronics, aerospace and defense, scientific instruments, autonomous vehicles and various video processing applications [1] [2]. In embedded systems, they have continued to be popular because of their unique combination of performance and flexibility.…”

Section: Introduction and Related Workmentioning

confidence: 99%

A Functionality-Based Runtime Relocation System for Circuits on Heterogeneous FPGAs

Enemali

Adetomi

Seetharaman

et al. 2018

IEEE Trans. Circuits Syst. II

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Abstract-Runtime Relocation of circuits on FPGAs have beenproposed for achieving many desirable features including fault tolerance, defragmentation and system load balancing. However, the changes in the architectural composition of FPGAs has made relocation more challenging mainly because FPGAs have become more heterogeneous. Previous and state-of-the-art circuit relocation systems on FPGAs have relied only on direct bitstream relocation which requires the source and destination resource layouts to be the same, as well as access to the design bitstream for manipulation. Hence, their efficiency on modern heterogeneous chips greatly reduces, and mostly cannot be applied to encrypted bitstreams of intellectual property (IP) blocks. In this paper, we present a circuit relocator which augments direct bitstream relocation with a functionalitybased relocation scheme. We demonstrate the feasibility of the proposed technique using a CORDIC application and show that an average of over 2.6-fold increase in number of relocations can be obtained compared to only direct bitstream relocation at expense of a small memory overhead and manageable relocation time for this case study.

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A Multi-Resolution FPGA-Based Architecture for Real-Time Edge and Corner Detection

Cited by 87 publications

References 26 publications

High performance computing on SpiNNaker neuromorphic platform: A case study for energy efficient image processing

High performance computing on SpiNNaker neuromorphic platform: A case study for energy efficient image processing

A Fault Diagnosis Approach for Rail Surface Anomalies Using FPGA in Railways

A Functionality-Based Runtime Relocation System for Circuits on Heterogeneous FPGAs

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