A Multi-Level-Cell Bipolar-Selected Phase-Change Memory

Bedeschi, F.; Fackenthal, R.; Resta, Claudio; Donze, Enzo Michele; Jagasivamani, Meenatchi; Buda, E.; Pellizzer, F.; Chow, David W.; Cabrini, A.; Calvi, G; Faravelli, R.; Fantini, A.; Torelli, G.; Mills, D.; Gastaldi, R.; Casagrande, G.

doi:10.1109/isscc.2008.4523240

Cited by 92 publications

(62 citation statements)

References 9 publications

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“…Error codes are specified as "(n,k)" where k bits of actual data are encoded into n > k bits of redundant/protected data. For example, Hamming introduced a (7,4) code that can correct a single error and detect (but not correct) up to two errors by appending the k=4 original data bits with three additional error-correcting bits. The coding is generalizable to larger blocks of data, such as the (72,64) code used to provide SECDED protection on 64-bit DRAM data.…”

Section: Error Correctionmentioning

confidence: 99%

Use ECP, not ECC, for hard failures in resistive memories

Schechter

Loh

Strauß

et al. 2010

Proceedings of the 37th Annual International Symposium on Computer Architecture

282

211

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As leakage and other charge storage limitations begin to impair the scalability of DRAM, non-volatile resistive memories are being developed as a potential replacement. Unfortunately, current error-correction techniques are poorly suited to this emerging class of memory technologies. Unlike DRAM, PCM and other resistive memories have wear lifetimes, measured in writes, that are sufficiently short to make cell failures common during a system's lifetime. However, resistive memories are much less susceptible to transient faults than DRAM. The Hamming-based ECC codes used in DRAM are designed to handle transient faults with no effective lifetime limits, but ECC codes applied to resistive memories would wear out faster than the cells they are designed to repair. This paper proposes Error-Correcting Pointers (ECP), a new approach to error correction optimized for memories in which errors are the result of permanent cell failures that occur, and are immediately detectable, at write time. ECP corrects errors by permanently encoding the locations of failed cells into a table and assigning cells to replace them. ECP provides longer lifetimes than previously proposed solutions with equivalent overhead. Furthermore, as the variance in cell lifetimes increases -a likely consequence of further process scaling -ECP's margin of improvement over existing schemes also increases.

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Section: Error Correctionmentioning

confidence: 99%

Use ECP, not ECC, for hard failures in resistive memories

Schechter

Loh

Strauß

et al. 2010

Proceedings of the 37th Annual International Symposium on Computer Architecture

282

211

View full text Add to dashboard Cite

show abstract

“…Specifically, NVM is expected to be used as secondary storage in addition to flash memory or HDDs (hard disk drives) due to their desirable properties such as relatively high performance, low-power consumption, and long endurance cycle [1][2][3][4][5][6]. This paper investigates how much performance gain can be obtained if we add NVM as various storage components (e.g., journal device, swap device, or file system device) of computer systems.…”

Section: Introductionmentioning

confidence: 99%

Optimized Adoption of NVM Storage by Considering Workload Characteristics

Kim¹,

Bahn²

2017

JSTS:Journal of Semiconductor Technology and Science

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Abstract-This paper presents an optimized adoption of NVM for the storage system of heterogeneous applications. Our analysis shows that a bulk of I/O does not happen on a single storage partition, but it is varied significantly for different application categories. In particular, journaling I/O accounts for a dominant portion of total I/O in DB applications like OLTP, whereas swap I/O accounts for a large portion of I/O in graph visualization applications, and file I/O accounts for a large portion in web browsers and multimedia players. Based on these observations, we argue that maximizing the performance gain with NVM is not obtained by fixing it as a specific storage partition but varied widely for different applications. Specifically, for graph visualization, DB, and multimedia player applications, using NVM as a swap, a journal, and a file system partitions, respectively, performs well. Our optimized adoption of NVM improves the storage performance by 10-61%.

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“…To address such problems, several new memory technologies have been proposed. Redox-Based Resistive Switching Memories [36], Phase Change Memories [13], and Spin-Transfer Torque Magneto-resistive Memories [28] are some of the emerging technologies that could possibly serve as the nextgeneration memories for various applications. Among these candidates, metal oxide valence change ReRAMs (more generally referred as memristor [8]) are especially promising due to excellent scaling prospects, high endurance and high speed which can also be combined with great retention [2,18].…”

Section: Introductionmentioning

confidence: 99%

Towards data reliable crossbar-based memristive memories

Ghofrani

Lastras-Montaño

Cheng

2013

2013 IEEE International Test Conference (ITC)

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A series of breakthroughs in memristive devices have demonstrated the potential of using crossbar-based memristor arrays as ultra-high-density and low-power memory. However, their unique device characteristics could cause data disturbance for both read and write operations resulting in serious data reliability problems.This paper discusses such reliability issues in detail and proposes a comprehensive yet low area-/performance-/energyoverhead solution addressing these problems. The proposed solution applies asymmetric voltages for disturbance confinement, inserts redundancy for disturbance detection, and employs a refreshing mechanism to restore weakened data. The results of a case study show that the average overheads of area, performance and energy consumption for achieving data reliability, over a baseline unreliable memory system, are 3%, 4%, and 19% respectively.

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A Multi-Level-Cell Bipolar-Selected Phase-Change Memory

Cited by 92 publications

References 9 publications

Use ECP, not ECC, for hard failures in resistive memories

Use ECP, not ECC, for hard failures in resistive memories

Optimized Adoption of NVM Storage by Considering Workload Characteristics

Towards data reliable crossbar-based memristive memories

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