A MOSFET-only voltage source with arbitrary sign adjustable temperature coefficient

Rossi-Aicardi, Conrado; Oreggioni, Julian; Silveira, Fernando; Dualibe, Carlos

doi:10.1109/newcas.2011.5981246

Cited by 9 publications

(5 citation statements)

References 8 publications

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“…Thus, several MOSFET-based references have been proposed [11][12][13][14][15] . Also, several designs replaced large IC resistors with transistors biased to work at a fixed drain voltage in triode operation [13,[16][17][18]. as shown in Fig.…”

Section: Initial Drawbacks and Solutionsmentioning

confidence: 99%

“…This section follows [18,23] in describing the Advanced Compact MOSFET (ACM) model [24,25] which is a continuously differentiable model that is consistent through all operating regions of the MOS transistor. The drain current through a MOS transistor is characterized by the difference of forward and reverse currents as shown in Fig.…”

Section: Acm Modelmentioning

confidence: 99%

“…To address the effect of process variations, the voltage reference designed in this work includes the digital trimming of the circuit as proposed in [18], where it was experimentally verified that the trimming of transistor currents can result in an output voltage that changed minimally with temperature.…”

Section: Solving Current Issuesmentioning

confidence: 99%

“…The fundamental topology for the voltage reference circuit [18] is described in this section. It follows the same premise as all the other recent voltage reference designs (as per the literature review) in that a diode-connected transistor is evaluated for a condition that produces zero temperature coefficient.…”

Section: Fundamental Topology For Achieving a Constant Voltagementioning

confidence: 99%

“…(4.12) completely determine the inversion levels of all NMOS transistors as a function of transistor width/length ratios. Thus the circuit produces a current that has a constant inversion level, independent of technology parameters, voltage supply, and temperature [18,19].…”

Section: Design Equations and Layout Considerationsmentioning

confidence: 99%

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Sub-1 V, 4 na CMOS voltage references with digitally-trimmable temperature coefficient

Luong

Christoffersen

Rossi-Aicardi

et al. 2014

2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS)

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Voltage references are fundamental to mixed signal converters which are widely used in electronics. Hence there are significant advantages in having the voltage reference operate with less power while minimizing area consumption and maintaining performance. Past designs have suffered from issues related to process variations which adversely affect the temperature coefficient of the circuit output. To compensate for these process variations, a means to modify the temperature coefficient are proposed and experimentally verified with two circuit architectures.Five test chip samples implement these architectures in a 0.35 µm CMOS process. Design methodologies for both architectures are presented. Design techniques include the use of a high-swing cascode to improve Line Sensitivity while minimizing additional power consumption, accounting for a well-matched layout, and the effect of leakage currents on the performance of the circuit.Layout schematics, performance figures, test methodologies and results are presented. Each circuit dissipates less than 4 nW and operates down to 0.9 V or better with Line Sensitivity and Power Supply Rejection Ratio of less than 0.15 %/V and -58 dB respectively, while consuming an area of 0.053 mm 2 or less. The experimental average and median temperature coefficient was less than 26 ppm/ • C and 22 ppm/ • C respectively in the −20 • C to 80 • C range, with the best performance being less than 8.1 ppm/ • C. Areas of improvement and potential areas of future research are then identified to facilitate advancement of this work. This work contains many thanks:• Thanks Dr. Carlos Christoffersen for continuing to push the boundaries of what can be done and encouraging the free expression of new ideas.

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