1999
DOI: 10.1109/82.754859
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A modular programmable CMOS analog fuzzy controller chip

Abstract: Abstract-We present a highly modular fuzzy inference analog CMOS chip architecture with on-chip digital programmability. This chip consists of the interconnection of parameterized instances of two different kind of blocks, namely label blocks and rule blocks. The architecture realizes a lattice partition of the universe of discourse, which at the hardware level means that the fuzzy labels associated to every input (realized by the label blocks) are shared among the rule blocks. This reduces the area and power … Show more

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Cited by 30 publications
(18 citation statements)
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“…Note also that this increased number of rules is not accompanied by a significant power consumption increase; neither by an operation speed drop. Actually, regarding power consumption, only the I m = 800mA prototype in [14] consumes less power than the MFCON chip, although it realizes four times less rules. Regarding speed, the prototype in [13] is faster, although its power consumption is much larger and its complexity much smaller.…”
Section: Discussionmentioning
confidence: 99%
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“…Note also that this increased number of rules is not accompanied by a significant power consumption increase; neither by an operation speed drop. Actually, regarding power consumption, only the I m = 800mA prototype in [14] consumes less power than the MFCON chip, although it realizes four times less rules. Regarding speed, the prototype in [13] is faster, although its power consumption is much larger and its complexity much smaller.…”
Section: Discussionmentioning
confidence: 99%
“…For instance, a fully analog controller designed by the authors [14] using similar circuitry yields 470ns and 8.6mW for 16 rules, while the MFCON chip yields 500ns and 16mW for 64 rules. Advantages of the proposed architecture become more evident as the number of rules and inputs increases [1].…”
Section: Discussionmentioning
confidence: 99%
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