A modular plant modeling technique and related controller synthesis problems

Hanisch, Hans-Michael; Lüder, Arndt; Thieme, Jan

doi:10.1109/icsmc.1998.725493

Cited by 19 publications

(11 citation statements)

References 7 publications

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“…Different aspects of plant modelling for the purpose of controller verification have been extensively studied in [6,14,5]. The approach presented there enables detailed and systematic modelling of the controlled processes by employing a special modelling formalism.…”

Section: Introductionmentioning

confidence: 99%

“…The proposed combined approach exploits the advantages of both frameworks. Compared to other model-based verification approaches that are described in the literature (e.g., [3,6,17], see also survey papers [4,7], and the references therein), the main advantage of the combined approach is that it eliminates the need for an additional plant model for the purpose of verifying the sequential controller. The corresponding model is derived automatically during the interlock design stage.…”

Section: Introductionmentioning

confidence: 99%

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An admissible-behaviour-based analysis of the deadlock in Petri-net controllers

Mušič

Matko

2008

Simulation Modelling Practice and Theory

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This paper addresses the problem of verifying the discrete control logic that is typically implemented by programmable controllers. Not only are the logical properties of the controller studied during verification, the behaviour of the overall controlled system is also examined. An approach that combines the calculation of the safety-oriented interlock controllers in terms of supervisory control theory (SCT), the corresponding calculation of the admissible behaviour of the system, and the specification of the desired system operation by Petri nets is proposed. A potential deadlock in the controlled system is then verified by taking the admissible-behaviour model as a process model. The analysis of the simultaneously operated supervisorycontrol-based interlock controller and the Petri-net-based sequential controller is performed with a C-reachability graph. The paper focuses on the calculation of the graph, and the approach is illustrated with an example of a simple manufacturing cell.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

An admissible-behaviour-based analysis of the deadlock in Petri-net controllers

Mušič

Matko

2008

Simulation Modelling Practice and Theory

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“…In the case of SCT, some authors 1 available at http://www.diee.unica.it/giua/WODES/ have proposed more or less generic approaches for the construction of the models of the plant (Hanisch et al (1998)) or of the specifications (Roussel and Giua (2005)). But in any case, the hypothesis that requirements can be inconsistent has never been taken into account, except in (Zowghi and Offen (1997)) where authors propose a theorization of requirements evolution.…”

Section: Introductionmentioning

confidence: 99%

Algebraic synthesis of logical controllers despite inconsistencies in specifications

Roussel

Lesage

2012

IFAC Proceedings Volumes

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This paper deals with the problem of consistency of the requirements which are the starting point of controller synthesis methods for Discrete Event Systems (DES). In previous papers, an algebraic synthesis method for logical systems has been proposed. This method includes a theorem allowing the proof of consistency of the set of specifications. In this paper, we show that if inconsistencies are detected, the conditions of these inconsistencies can be given to the designer. It is therefore possible for the designer to propose priority rules between the involved requirements allowing the correction of incoherent specifications. Both the mathematical and the methodological aspects of this work are presented. In an illustrative purpose, the case study of a hydraulic press is developed.

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“…We omit its details out of this paper. Here are given main definitions: TNCES ={P,T,F,mo,yv,CN,EN,DC}(1) [1] {Cin ,Ein,Cout,Eot, Bc, Be, Cs, Dt} (2) [1] DC = {DR,DL,D0} (3) [1] TNCES,omposite = {M, CminP, Cm0Ut,Eninp,Emn0,Ic, Je} (4) [5] Figure 1 demonstrates the approach:. Tp is the function that translates UML diagrams to the TNCES [7].…”

Section: Figure 1 Elements Of Verification Proceduresmentioning

confidence: 99%

On Controller and Plant Modeling for Model-based Formal Verification

Lobov

Lastra

Tuokko

2005 IEEE Conference on Emerging Technologies and Factory Automation

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The acceptance of formal methods in industry is a challenging task mainly due to difficult learning process and the lack of the tools and methods helping control engineer to interpret the results of formal verification procedure. We model existing source code ofthe controller and controller related information (controller model) along with controlled object (plant model) and verify modeled system by means ofmodel-checking.This paper focuses on the issues related to controller and plant modeling. Ladder logic modeling is discussed along with the problems related to the plant modeling.

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A modular plant modeling technique and related controller synthesis problems

Cited by 19 publications

References 7 publications

An admissible-behaviour-based analysis of the deadlock in Petri-net controllers

An admissible-behaviour-based analysis of the deadlock in Petri-net controllers

Algebraic synthesis of logical controllers despite inconsistencies in specifications

On Controller and Plant Modeling for Model-based Formal Verification

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