A Modified Low-Density Parity-Check Decoder for Holographic Data Storage System

Yoon

Park

et al. 2009

jjap

Self Cite

In this study, misalignment compensation and equalization methods for holographic data storage are developed and evaluated. The proposed compensation algorithm removes a known contribution for pixel misregistration. The equalization technique reduces the number of error factors created by bright ''Off'' and dark ''On'' pixels. Experimental results are shown to verify the effectiveness of the proposed algorithm. #

Section: Equalization Schemementioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Misalignment Compensation and Equalization for Holographic Data Storage

Yoon

Park

et al. 2009

jjap

Self Cite

“…1) To manage these two problems, many kinds of equalizers, [3][4][5][6][7][8] modulation codes, [9][10][11][12][13][14] and error correcting codes were developed. [15][16][17] To compensate for data distortion, we propose two types of 2D iterative decoding (ID) schemes. One is the ID scheme using a single parity bit (ID-SPB).…”

Section: Introductionmentioning

confidence: 99%

Two-Dimensional Iterative Decoding Schemes for Holographic Data Storage Systems

Kong

Choi³

2012

Jpn. J. Appl. Phys.

Two iterative decoding (ID) schemes, which are the ID using a single parity bit (ID-SPB) and ID using a modulation code (ID-MC), are proposed for holographic data storage systems. In the ID-SPB, a single two-dimensional parity bit is employed to conduct ID, whereas in the ID-MC, the inherent constraint of the modulation code is utilized to conduct ID. In both schemes, a data page is iteratively decoded by exchanging extrinsic information between the horizontal and vertical data bits in the page. In particular, in the ID-SPB, by adding more parity bits to each row and column of the interleaved page, we can conduct the ID within a page as well as between the original and interleaved pages. Thus, additional performance gain can be achieved in the ID-SPB. On the other hand, the ID-MC has a performance gain without loss of data rate since parity bits are not required for ID. The simulation results show that the proposed ID-SPB and ID-MC have about 2-4 and 1-2 dB performance gains in terms of bit error rate compared with the system without ID, respectively. #

“…Therefore, an effective signal processing algorithm has been proposed for reliable data readout over noisy HDDS channels. [3][4][5][6][7][8] Appropriate channel coding and decoding schemes are implemented with a field-programmable gate array (FPGA) chip for fast data processing. The hardware channel board is designed to demonstrate real-time recording and reading of the DEPROTO-III, which is the prototype HDDS developed at Daewoo.…”

Section: Introductionmentioning

confidence: 99%

Design and Implementation of a Hardware Channel Board for Holographic Data Storage

Yoon

Park

et al. 2009

jjap

Self Cite

A channel board has been designed, manufactured, and used for real-time recording and reading processes. The channel coding and decoding algorithms were implemented on Xilinx field-programmable gate array (FPGA) devices. For fast data transmission between the channel board and personal computer (PC), a universal serial bus (USB) 2.0 interface is installed in the channel board. The firmware and device driver for USB interface achieved a transfer rate of 34 Mbyte/s. A holographic data storage system records a video stream, which was successfully retrieved and reconstructed without error. #