A mixed-signal built-in self-test approach for analog circuits

Stroud, Charles E.; Morton, John; Islam, Tarikul; Alassaly, Hazem Bassam

doi:10.1109/ssmsd.2003.1190426

Cited by 24 publications

(20 citation statements)

References 7 publications

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“…In the known methods, output responses of mixedsignal circuits are compacted by a circuit referred to as a modulo adder (or accumulator, or digital integrator) [4][5][6][7][8]. It should be noted that a modulo adder is a special case of a residue computing circuit [14].…”

Section: A Conventional Signature Analyzermentioning

confidence: 99%

“…Signature analysis has been widely used for digital and mixedsignal systems testing [1][2][3][4][5][6][7][8][9][10][11][12]. Mixed-signal systems consist of both digital and analog circuits; however the signature analysis method is only applicable to the subset of these systems that have digital outputs (such as analog-to-digital converters, measurement instruments, etc.).…”

Section: Introductionmentioning

confidence: 99%

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On the Use of an Algebraic Signature Analyzer for Mixed-Signal Systems Testing

Geurkov

Kirischian

2014

VLSI Design

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We propose an approach to design of an algebraic signature analyzer that can be used for mixed-signal systems testing. The analyzer does not contain carry propagating circuitry, which improves its performance as well as fault tolerance. The common design technique of a signature analyzer for mixed-signal systems is based on the rules of an arithmetic finite field. The application of this technique to the systems with an arbitrary radix is a challenging task and the devices designed possess high hardware complexity. The proposed technique is simple and applicable to systems of any size and radix. The hardware complexity is low. The technique can also be used in arithmetic/algebraic coding and cryptography.

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Section: A Conventional Signature Analyzermentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

On the Use of an Algebraic Signature Analyzer for Mixed-Signal Systems Testing

Geurkov

Kirischian

2014

VLSI Design

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“…This method uses circuit level sensitivity analysis. A built in self test technique with input stimulus using ramp generator is given in [2]. This method is implemented using Tspice and used the simulated data.…”

Section: Introductionmentioning

confidence: 99%

Fault Diagnosis of Mixed-Signal Analog Circuit using Artificial Neural Networks

Narula¹,

Singh²

2015

IJISA

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Abstract-This paper presents parametric fault diagnosis in mixed-signal analog circuit using artificial neural networks. Single parametric faults are considered in this study. A benchmark R2R digital to analog converter circuit has been used as an example circuit for experimental validations. The input test pattern required for testing are reduced to optimum value using sensitivity analysis of the circuit under test. The effect of component tolerances has also been taken care of by performing the Monte-Carlo analysis. In this study parametric fault models are defined for the R2R network of the digital to analog converter. The input test patterns are applied to the circuit under test and the output responses are measured for each fault model covering all the Monte-Carlo runs. The classification of the parametric faults is done using artificial neural networks. The fault diagnosis system is developed in LabVIEW environment in the form of a virtual instrument. The artificial neural network is designed using MATLAB and finally embedded in the virtual instrument. The fault diagnosis is validated with simulated data and with the actual data acquired from the circuit hardware.

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“…Early approaches were primarily aimed at defectoriented testing of the analog circuitry for manufacturing and system-level testing [2] [3]. More recent approaches are target analog functional test and measurement, or specificationoriented testing [4]- [6].…”

Section: Introductionmentioning

confidence: 99%

“…Some of the common functional measurements include frequency response (both amplitude and phase measurements), noise figure (NF), and linearity, also known as third order intercept point (IP3) [2]. The early defect-oriented mixed-signal BIST approaches could be developed with parameterized VHDL or Verilog for easy integration into most circuits and systems, as was the case in [3]. While Fast Fourier Transform (FFT) approaches have been parameterized in hardware description languages, such as VHDL, as in the case of [4] and [5], the hardware overhead and power consumption typically associated with an FFTs prevent it from being an efficient BIST approach, unless the FFT is an inherent component of the system.…”

Section: Introductionmentioning

confidence: 99%