A mixed precision Monte Carlo methodology for reconfigurable accelerator systems

Chow, Gary C.T.; Tse, Anson H.T.; Jin, Qiwei; Luk, Wayne; Leong, Philip H. W.; Thomas, David B.

doi:10.1145/2145694.2145705

Cited by 36 publications

(30 citation statements)

References 15 publications

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“…8 significant bits and 8 bits for the exponent). As the results indicate, for CP-MCMC simulations where the reduced precision datapaths are used for all the likelihood terms and models the existing hardware design approaches, the mean value of the parameter has a significant bias and also a larger variance compared to the DP-MCMC results, supporting the results obtained in [16], [17]. However, the CF-MCMC sample distributions have the same variance and mean as DP-MCMC samples, which demonstrates that the proposed algorithm removes any bias introduced in the results due to low-precision computations.…”

Section: Quality Of Mcmc Samplessupporting

confidence: 67%

“…Previous works on FPGAs using custom precision can be found in [16], [17], [22], [23]. [23] propose the use of custom precision arithmetic for population-based MCMC methods where multiple parallel chains are used to improve the mixing properties of the chain.…”

Section: Specialised Hardware Approachesmentioning

confidence: 99%

“…However, placing such a threshold does not limit the bias in the estimate. [17] employ an auxiliary mixed precision run to correct the bias in the output estimates. However, their method requires knowledge of the function of interest during the design of the system, and as such the generated samples cannot be used for other estimates.…”

Section: Specialised Hardware Approachesmentioning

confidence: 99%

“…However, both approaches lead to biased estimates that exhibit large variance due to the approximations of the target distribution. Even though a controlled biased estimate can be accepted in certain applications [16], there is a large number of applications where unbiased estimates 1 of the given parameters of the sampling distribution are required, and MCMC algorithms are expected to perform exact inference in these problems [17].…”

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

An Unbiased MCMC FPGA-Based Accelerator in the Land of Custom Precision Arithmetic

Liu

Mingas

Bouganis

2017

IEEE Trans. Comput.

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Abstract-Markov Chain Monte Carlo (MCMC) based methods have been the main tool used for Bayesian Inference by practitioners and researchers due to their flexibility and theoretical properties that guarantee unbiased sampling-based estimates. Nevertheless, with the availability of large data sets and the constant need to develop more complex models that better capture the targeted problem, significant computational challenges have been presented. Current approaches, based on multi-core CPUs, GPUs, and FPGAs, aim to accelerate the execution time of the MCMC methods using subsampling techniques or custom precision arithmetic, resulting to biased estimates. In this work, a novel FPGA-based construction is proposed that utilises the custom precision support of FPGA devices in order to accelerate the computations, guaranteeing at the same time asymptotically unbiased estimates. Key to this approach is the extension of the parameter space by an extra parameter that indicates the required precision in the computation of the likelihood of a data point. The work proposes an FPGA architecture for the above algorithm, as well as discuss its tuning for maximising the performance of the system. The performance of the FPGA-mapped sampler is evaluated using two Bayesian logistic regression case studies of varying complexity, which show significant speedups compared to existing FPGA-and CPU-based works that utilise double floating point arithmetic, without any bias on the sampling-based estimates.

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Section: Quality Of Mcmc Samplessupporting

confidence: 67%

Section: Specialised Hardware Approachesmentioning

confidence: 99%

Section: Specialised Hardware Approachesmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

An Unbiased MCMC FPGA-Based Accelerator in the Land of Custom Precision Arithmetic

Liu

Mingas

Bouganis

2017

IEEE Trans. Comput.

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“…5). There are certain improvements that can only be made on specific accelerators, for example utilising multiple pipelines or mixing fixed and floating point calculations on FPGAs [6].…”

Section: E Optimisation Phasesmentioning

confidence: 99%

A Domain Specific Language for accelerated Multilevel Monte Carlo simulations

Lindsey

Leslie

Luk

2016

2016 IEEE 27th International Conference on Application-Specific Systems, Architectures and Processors (ASAP)

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Abstract-Monte Carlo simulations are used to tackle a wide range of exciting and complex problems, such as option pricing and biophotonic modelling. Since Monte Carlo simulations are both computationally expensive and highly parallelizable, they are ideally suited for acceleration through GPUs and FPGAs. Alongside these accelerators, Multilevel Monte Carlo techniques can be harnessed to further hasten simulations. However, researchers and application developers must invest a great deal of effort to design, optimise and test such Monte Carlo simulations. Furthermore, these models often have to be rewritten from scratch to target new hardware accelerators. This paper presents Neb, a Domain Specific Language for describing and generating Multilevel Monte Carlo simulations for a variety of hardware architectures. Neb compiles equations written in L A T E X to C++, OpenCL or Maxeler's MaxJ language, allowing acceleration through GPUs or FPGAs. Neb can be used to solve stochastic equations or to generate paths for analysis with other tools. To evaluate the performance of Neb, a variety of financial models are executed on CPUs, GPUs and FPGAs, demonstrating peak acceleration of 3.7 times with FPGAs in 40nm transistor technology, and 14.4 times with GPUs in 28nm transistor technology. Furthermore, the energy efficiency of these accelerators is compared, revealing FPGAs to be 8.73 times and GPUs 2.52 times more efficient than CPUs.

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Exploiting Mixed-Precision Arithmetics in a Multilevel Monte Carlo Approach on FPGAs

Omland

Hefter

Ritter

et al. 2015

FPGA Based Accelerators for Financial Applications

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A mixed precision Monte Carlo methodology for reconfigurable accelerator systems

Cited by 36 publications

References 15 publications

An Unbiased MCMC FPGA-Based Accelerator in the Land of Custom Precision Arithmetic

An Unbiased MCMC FPGA-Based Accelerator in the Land of Custom Precision Arithmetic

A Domain Specific Language for accelerated Multilevel Monte Carlo simulations

Exploiting Mixed-Precision Arithmetics in a Multilevel Monte Carlo Approach on FPGAs

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