A Miniaturized 3-way Power Divider Based on Bagley Polygon

Abstract

A three-way power divider based on Bagley polygon is here reduced in dimension by applying the concept of reducing delay line length by applying open circuit stubs. Whereas this technique is known in literature, the delay line reduction is done symmetrically by placing the stub mid-line, which would imply packing issues leading to a reduced size reduction. In this contribution a theoretical development on non-symmetric reduced length delay line is carried out, allowing for a more effective size reduction of the Bagley-based power divider. Measurements on a prototype designed at 2.45 GHz occupying less than half of the area of a canonical Bagley divider with comparable performances over a slightly reduced operational bandwidth prove the validity of the approach.