A Methodology for Performance Analysis of Non-blocking Algorithms Using Hardware and Software Metrics

Izadpanah, Ramin; Feldman, Steven; Dechev, Damian

doi:10.1109/isorc.2016.16

Cited by 5 publications

(2 citation statements)

References 11 publications

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“…The performance evaluation follows the experimentation methodology for the analysis of non-blocking data structures presented by Izadpanah et. al [13].…”

Section: Stm Implementation and Resultsmentioning

confidence: 98%

Reimplementation and Performance Evaluation of a Lock-free Queue with Batching

Mirschel¹,

Rigby²,

Motta³

2019

Preprint

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This paper describes an implementation of a lock-free queue that utilizes batching to increase performance by up to 16x over standard lock-free queues. We attempted to implement the design and algorithms from the original research paper BQ: A Lock-Free Queue with Batching and tried to reproduce similar functionality and performance. The original implementation of this data structure was done in C++, but we wanted to try and build this in Java so we could compare the results of how the data structure performs in two different languages.

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“…The performance evaluation follows the experimentation methodology for the analysis of non-blocking data structures presented by Izadpanah et. al [13].…”

Section: Stm Implementation and Resultsmentioning

confidence: 98%

Reimplementation and Performance Evaluation of a Lock-free Queue with Batching

Mirschel¹,

Rigby²,

Motta³

2019

Preprint

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“…HPC-monitoring tools collect global system information on resource utilization and system states such as network and storage usage, CPU and memory utilization, and environmental conditions. Also, events from the inside of applications can have critical performance implications [25,34]. In this article, we present an approach to continuously collect application level performance data and expose them to HPC-monitoring tools.…”

Section: Introductionmentioning

confidence: 99%

Production Application Performance Data Streaming for System Monitoring

Izadpanah

Allan

Dechev

et al. 2019

ACM Trans. Model. Perform. Eval. Comput. Syst.

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In this article, we present an approach to streaming collection of application performance data. Practical application performance tuning and troubleshooting in production high-performance computing (HPC) environments requires an understanding of how applications interact with the platform, including (but not limited to) parallel programming libraries such as Message Passing Interface (MPI). Several profiling and tracing tools exist that collect heavy runtime data traces either in memory (released only at application exit) or on a file system (imposing an I/O load that may interfere with the performance being measured). Although these approaches are beneficial in development stages and post-run analysis, a systemwide and low-overhead method is required to monitor deployed applications continuously. This method must be able to collect information at both the application and system levels to yield a complete performance picture. In our approach, an application profiler collects application event counters. A sampler uses an efficient inter-process communication method to periodically extract the application counters and stream them into an infrastructure for performance data collection. We implement a tool-set based on our approach and integrate it with the Lightweight Distributed Metric Service (LDMS) system, a monitoring system used on large-scale computational platforms. LDMS provides the infrastructure to create and gather streams of performance data in a low overhead manner. We demonstrate our approach using applications implemented with MPI, as it is one of the most common standards for the development of large-scale scientific applications. We utilize our tool-set to study the impact of our approach on an open source HPC application, Nalu. Our tool-set enables us to efficiently identify patterns in the behavior of the application without source-level knowledge. We leverage LDMS to collect system-level performance data and explore the correlation between the system and application events. Also, we demonstrate how our tool-set can help detect anomalies with a low latency. We run tests on two different architectures: a system enabled with Intel Xeon Phi and another system equipped with Intel Xeon processor. Our overhead study shows our method imposes at most 0.5% CPU usage overhead on the application in realistic deployment scenarios.

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