2021
DOI: 10.1109/tpel.2020.3009008
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A Method to Balance Dynamic Current of Paralleled SiC MOSFETs With Kelvin Connection Based on Response Surface Model and Nonlinear Optimization

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Cited by 42 publications
(12 citation statements)
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“…The study in [85] can effectively improve the current balance among paralleled dies by adjusting the length of the bonding wires to mitigate the parasitic parameter variability of the power loops, as shown in Figure 22. This method requires no additional design and only some modifications on bonding lines; thus, it is compatible with the traditional packaging technologies.…”
Section: Common Source Parasitic Inductancementioning
confidence: 99%
“…The study in [85] can effectively improve the current balance among paralleled dies by adjusting the length of the bonding wires to mitigate the parasitic parameter variability of the power loops, as shown in Figure 22. This method requires no additional design and only some modifications on bonding lines; thus, it is compatible with the traditional packaging technologies.…”
Section: Common Source Parasitic Inductancementioning
confidence: 99%
“…To increase the current ratings, discrete devices are usually used in parallel for highpower applications (Bertelshofer et al, 2019). Due to a mismatch in the parameters of the devices (Wang G. et al, 2014;Ke et al, 2018;Zhao et al, 2021a;Zhao et al, 2021b) and asymmetrical layout design Tiwari et al, 2015;La Mantia et al, 2017), the current distribution among parallel-connected discrete devices is uneven, leading to imbalanced power loss distribution, uneven temperature rise and risk of device thermal runaway.…”
Section: Uneven Current Distribution Concernmentioning
confidence: 99%
“…In Wang G. et al (2014), thirty samples of SiC MOSFET (C2M0160120DA) from the same vendor under room temperature are evaluated and it has been reported that the difference of R DSon can reach up to 20% and the difference of V th can reach up to 24% (Wang G. et al, 2014). The variation in the parameters of devices, called device mismatch, causes unequal current distribution (Wen et al, 2021;Zhao et al, 2021a;Zhao et al, 2021b). In addition, due to asymmetrical layout design, the discrepancy in the parasitic inductances of the circuit also causes uneven current distribution Tiwari et al, 2015;La Mantia et al, 2017;Hu and Shao, 2021).…”
Section: Categories Of Current Imbalance and Causesmentioning
confidence: 99%
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“…Response surface method includes many experimental design and data processing techniques, such as experimental design, regression equation modeling, model significance test, and factor combination condition optimization. By fitting the functional relationship between the response and various factors, drawing the response surface and contour line, the response value corresponding to each factor level can be easily obtained; then the optimal response value corresponding to the level of each factor can be found out [25][26][27][28]. e RSM has several advantages, such as the efficiency to predict the model for each response, to construct a robust model with a small number of experimental data points, to assess the interaction effect between the factors, and to locate the optimal response [29][30][31].…”
Section: Introductionmentioning
confidence: 99%