Thermal analysis has been essential in designing reliable ICs. This becomes even more critical when multiple thin dies are stacked together to form a 3D integration. This paper presents our work on thermal modeling, analysis, and simulations on the first 2D prototype of Vertically Integrated PRAM (proto-VIPRAM00) chip. We proposed a sub-circuit-block level thermal simulation approach using Fourier heat flow model, where one CAM cell in proto-VIPRAM00 is used as a unit heat source. This approach significantly reduces the simulation time and computing resources while providing efficient and accurate thermal/temperature simulations in both 2D and 3D IC scenarios.