A method for modeling the manufacturability of IC designs

Abstract

A methodology for modeling the manufacturability of MOS transistors and circuits has been developed. The models are based on a small set of measurable process characterization parameters, whose variation explains the range of performance seen during production. A statistical MOSFET model, based on these measurable process parameters, was developed using global optimization and regression modeling of key fitting parameters to accurately predict transistor characteristics over a wide range of process variation. These same process parameters can be measured on the manufacturing floor, both in-line and at electrical test, and used to predict the performance of the fabricated integrated circuit before packaging and final test. The models for use in manufacturing and design are integrated, and data taken from the manufacturing line can be used to identify process shifts as well as to suggest design improvements for manufacturability enhancement. IntroductionIn today's competitive semiconductor manufacturing environment, it is important to be able to anticipate the effects of processing variation while still designing the product, and to characterize and control this variation while producing it [1,2]. In this work we present a methodology for modeling IC performance in terms of a simple set of process characterization data. First, a MOSFET model is developed, which utilizes a set of process parameters to predict transistor performance across the range of process variation seen on the fabrication line. At the design stage, the MOSFET model can be used for statistical circuit simulation in order to test the manufacturability of the design. These parameters can also be measured during production, and used to predict the performance of fabricated parts, early in the production cycle. A compact, product-specific performance prediction model is built from a combination of simulation results and manufacturing data. The prediction model can be used with production data for process control and production planning.This method has been applied on a commercial 1 Mbit EPROM fabricated in a 1.5 pm CMOS process.This work is based in previous physically based, statistical device modeling efforts [3,4,5]. Despite these previous efforts, however, Design for Manufacturability (DFM) still has limited use in the semiconductor industry. There are several reasons for this problem which are addressed in this research.First, early work in statistical modeling relied heavily on the use of process simulation, with the accompanying prohlem of tuning the simulator to match an actual manufacturing line [6]. The method presented in this work does not rely on process simulation, but uses data collected from transistor characterization, in conjunction with straightforward device physics. Further, the use of manufacturing data ensures that the parameters are measurable using production line capable techniques, and that they explain most of the variation seen on an actual fab line.Secondly, the early statistical device models were verified by matching a...

Pre-production results demonstrating multiple-system models for yield analysis

“…Boskin et al [9] have used regression models to predict IC performance results prior to completion of manufacturing. Data from electrical test measurements between manufacturing steps are used to predict the final electrical performance of the IC.…”

A system model for feedback control and analysis of yield: A multistep process model of effective gate length, poly line width, and IV parameters

“…Boskin et al [11] have used a combination of regression models and physical device models to predict IC performance results prior to completion of manufacturing. Data from inline electrical test measurements and other inline manufacturing 0894-6507/01$10.00 © 2001 IEEE data are used in linear regression models.…”

Device oriented statistical modeling method for process variability in 45nm analog CMOS technology

“…Alternately process oriented simulation techniques attempt to characterize device variation through perturbed process parameters [3]. In the area of device oriented statistical modeling, statistical MOSFET model proposed, based on these measurable process parameters, is developed using global optimization and regression modeling of key fitting parameters [4]. Device model parameters are then extracted using optimization techniques.…”