A massively parallel implementation of the watershed based on cellular automata

Noguet, Dominique

doi:10.1109/asap.1997.606811

Cited by 12 publications

(11 citation statements)

References 18 publications

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“…Since the gradient operation and flooding operation can be both implemented in this reconfigurable accelerator, and the accelerator supports self-control ability, the software control loading is lighter. In addition, the hardware cost is much smaller than Noguet's work [22]. Therefore, the proposed accelerator can support both gradient and flooding operations with less gate count.…”

Section: System Performancementioning

confidence: 85%

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Reconfigurable Morphological Image Processing Accelerator for Video Object Segmentation

Chien

Chen

2008

J Sign Process Syst

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Video object segmentation is an important pre-processing task for many video analysis systems. To achieve the requirement of real-time video analysis, hardware acceleration is required. In this paper, after analyzing existing video object segmentation algorithms, it is found that most of the core operations can be implemented with simple morphology operations. Therefore, with the concepts of morphological image processing element array and stream processing, a reconfigurable morphological image processing accelerator is proposed, where by the proposed instruction set, the operation of each processing element can be controlled, and the interconnection between processing elements can also be reconfigured. Simulation results show that most of the core operations of video object segmentation can be supported by the accelerator by only changing the instructions. A prototype chip is designed to support real-time change-detection-andbackground-registration based video object segmentation algorithm. This chip incorporates eight macro processing elements and can support a processing capacity of 6,200 9-bit morphological operations per second on a SIF image. Furthermore, with the proposed tiling and pipelined-parallel techniques, a realtime watershed transform can be achieved using 32 macro processing elements.

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Section: System Performancementioning

confidence: 85%

“…It is implied that the software control loading is high, and it is hard to achieve realtime requirement. Noguet's work [22] use a large array processor for watershed transform, where each pixel is processed with a PE. It can achieve real-time; however, the hardware cost is enormous.…”

Section: System Performancementioning

confidence: 99%

Reconfigurable Morphological Image Processing Accelerator for Video Object Segmentation

Chien

Chen

2008

J Sign Process Syst

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“…In [5], an approach based on cellular automata was proposed. Each pixel in a given image is mapped onto a cell in a cell array (N 9 N cells are necessary to process images of N 9 N pixels), and labels given to local minima are propagated on the array.…”

Section: Previous Workmentioning

confidence: 99%

“…4, our algorithm is described in detail, and its FPGA implementation is described in Sect. 5. Experimental results are discussed in Sect.…”

Section: Introductionmentioning

confidence: 99%

Real-time image segmentation based on a parallel and pipelined watershed algorithm

Trieu

Matsumoto

2007

J Real-Time Image Proc

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The watershed transformation is a popular image segmentation technique for gray scale images. This paper describes a real-time image segmentation based on a parallel and pipelined watershed algorithm which is designed for hardware implementation. In our algorithm:(1) pixels in a given image are repeatedly scanned from top-left to bottom-right, and then from bottom-right to topleft, in order to achieve high performance on a pipelined circuit by simplifying memory access sequences, (2) all steps in the algorithm are executed at the same time in the pipelined circuit, (3) the amount of data that are scanned is gradually reduced as the calculation progresses by memorizing which data are modified in the previous scan, and (4) N pixels can be processed in parallel. In our current implementation on an off-the-shelf field-programmable gate array board, up to four pixels can be processed in parallel. The performance for 512 9 512 pixel images is fast enough to be the first step in real-time applications.

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“…This intuitive concept leaves room for various formalizations, watershed definitions, algorithms and implementation but in practice, it can be divided into two classes, one based on the specification of a recursive algorithm by Vincent and Soille [9], and another one based on distance functions by Meyer [10]. Moreover, watershed methods are usually based on sequential algorithms but during the last decade serious efforts were made to find parallel implementation strategies [15] [11]. Unfortunately, despite the use of all the techniques and architectures, there is always a stage in the watershed transform which remains a global operation.…”

Section: Introductionmentioning

confidence: 99%

Cellular automaton for ultra-fast watershed transform on GPU

Kauffmann

Piché

2008

2008 19th International Conference on Pattern Recognition

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In this paper we describe a cellular automaton (CA) used to perform the watershed transform in N-D images. Our method is based on image integration via the Ford-Bellman shortest paths algorithm. Due to the local nature of CA algorithms we show that they are designed to run on massively parallel processors and therefore, be efficiently implemented on low cost consumer graphical processing units (GPUs).

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A massively parallel implementation of the watershed based on cellular automata

Cited by 12 publications

References 18 publications

Reconfigurable Morphological Image Processing Accelerator for Video Object Segmentation

Reconfigurable Morphological Image Processing Accelerator for Video Object Segmentation

Real-time image segmentation based on a parallel and pipelined watershed algorithm

Cellular automaton for ultra-fast watershed transform on GPU

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