“…To fairly compare the performance of the oscillators operating at different frequencies with different power dissipation, the figure-of-merit (FoM) is used [ 6 ]. The FoM of this work has a smaller value of −166 compared to other ring-based oscillators [ 6 , 8 , 11 , 16 , 17 ]. Although the inductor- or transformer-based oscillators [ 9 , 12 ] show a better FoM, the chip area is inevitably large and the tuning range is also limited due to the parasitic capacitors.…”
A low-power, low-phase-noise quadrature oscillator for Medical Implantable Communications Service (MICS) transceivers is presented. The proposed quadrature oscillator generates 349~689 MHz I/Q (In-phase and Quadrature) signals covering the MICS band. The oscillator is based on a differential pair with positive feedback. Each delay cell consists of a few transistors enabling lower voltage operation. Since the oscillator is very sensitive to disturbances in the supply voltage and ground, a self-bias circuit for isolating the voltage disturbance is proposed to achieve bias voltages which can track the disturbances from the supply and ground. The oscillation frequency, which is controlled by the bias voltages, is less sensitive to the supply and ground noise, and a low phase noise is achieved. The chip is fabricated in the UMC (United Microelectronics Corporation) 0.18 μm CMOS (Complementary Metal Oxide Semiconductor) process; the core just occupies a 28.5 × 22 μm2 area. The measured phase noise is −108.45 dBc/Hz at a 1 MHz offset with a center frequency of 540 MHz. The gain of the oscillator is 0.309 MHz/mV with a control voltage from 0 V to 1.1 V. The circuit can work with a supply voltage as low as 1.2 V and the power consumption is only 0.46 mW at a 1.8 V supply voltage.
“…To fairly compare the performance of the oscillators operating at different frequencies with different power dissipation, the figure-of-merit (FoM) is used [ 6 ]. The FoM of this work has a smaller value of −166 compared to other ring-based oscillators [ 6 , 8 , 11 , 16 , 17 ]. Although the inductor- or transformer-based oscillators [ 9 , 12 ] show a better FoM, the chip area is inevitably large and the tuning range is also limited due to the parasitic capacitors.…”
A low-power, low-phase-noise quadrature oscillator for Medical Implantable Communications Service (MICS) transceivers is presented. The proposed quadrature oscillator generates 349~689 MHz I/Q (In-phase and Quadrature) signals covering the MICS band. The oscillator is based on a differential pair with positive feedback. Each delay cell consists of a few transistors enabling lower voltage operation. Since the oscillator is very sensitive to disturbances in the supply voltage and ground, a self-bias circuit for isolating the voltage disturbance is proposed to achieve bias voltages which can track the disturbances from the supply and ground. The oscillation frequency, which is controlled by the bias voltages, is less sensitive to the supply and ground noise, and a low phase noise is achieved. The chip is fabricated in the UMC (United Microelectronics Corporation) 0.18 μm CMOS (Complementary Metal Oxide Semiconductor) process; the core just occupies a 28.5 × 22 μm2 area. The measured phase noise is −108.45 dBc/Hz at a 1 MHz offset with a center frequency of 540 MHz. The gain of the oscillator is 0.309 MHz/mV with a control voltage from 0 V to 1.1 V. The circuit can work with a supply voltage as low as 1.2 V and the power consumption is only 0.46 mW at a 1.8 V supply voltage.
“…Reported works have included secondary feed-forward inverters inside the main oscillator loop to increase the maximum oscillation frequency f max [1]- [4] and enhance the tuning range. The ratio between feed-forward and the main oscillator's delay cells (feed-forward strength) may increase RO f max up to four times [3].…”
Multi-protocol support applications and complex systems-on-chip demand several clock sources to fulfill the diverse data exchanging. This paper presents an fmax/fmin = 15000 tuning range feed-forward differential ring oscillator to reduce the total number of required clock references with no additional frequency dividers. Secondary feed-forward loops allow the oscillator to increase 3X the maximum oscillation frequency up to 1.5GHz while achieving a 100kHz minimum frequency. The proposed feed-forward oscillator generates a kHz-to-GHz output frequency occupying an area of 0.05mm 2 in a pure digital 180nm CMOS process node. Post-layout simulations report an RMS jitter of 3.1ps@1.25GHz with a maximum 8mW@1.5GHz power consumption and a phase error of 1.4 • @1.5GHz.
“…In the forward interpolator scheme, a main loop path was adopted to create multiphase outputs and an aided path (2 nd loop) was adopted to achieve high operating frequency, as depicted in Fig. 9 (b) [13], [33]- [36]. In the stable ring oscillator, the output phase has only one phase value.…”
Section: (A)-(d))mentioning
confidence: 99%
“…Fig. 1 depicts the relationship between the power performance and operating frequencies of all-digital PLLs (ADPLLs) [1]- [8], charge-pump PLLs (CPPLLs) [9]- [13] and hybrid digital PLLs (HDPLLs) [14]- [15] for lowsupply-voltage operations. Operating PLLs at low supply voltage is difficult.…”
An all-digital phase-locked loop (ADPLL) with a multiphase digitally controlled oscillator (DCO) incorporating the bootstrapped and interpolated schemes is proposed in this paper. The bootstrapped ring oscillator can boost the output voltage to a higher level than the supply voltage. Thus, the oscillator can be operated in low-supply-voltage applications. MOS varactor is used in the bootstrapped capacitor to reduce the area cost. Circuit analysis and simulated verification were performed for an optimized design. The interpolated DCO has multiphase outputs and a high operating frequency. The test chip was implemented in a 90-nm CMOS process, and the core area was 60 × 117 μm 2. The power consumptions at 1160 MHz and 20 MHz were 912.6 μW (at 0.6 V) and 2.94 μW (at 0.2 V), respectively. In the worst-case jitter performance, the root mean square (RMS) jitters were less than 0.42%. INDEX TERMS Bootstrapped, digitally controlled oscillator (DCO), interpolation, multiphase, phaselocked loop (PLL).
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