This paper presents the real-time hardware-in-theloop (HIL) emulation of an induction machine (IM) driven by a modular multilevel converter (MMC) on the field-programmable gate array (FPGA). The insulated gate bipolar transistors and antiparallel diodes of the MMC are modeled with nonlinear static and dynamic characteristics to provide not only accurate system-level performance of the converter but also insight into the power losses under different operation conditions. Due to the large network size of the MMC, its solution in conjunction with the IM fifth-order model proved to be a significant computational challenge. Therefore, circuit partitioning based on the transmission line modeling is proposed, which introduced an interface to the electrical network for the IM as well as split the multiloop MMC into several smaller subcircuits in terms of matrix size, and consequently enabled a fully parallel implementation on the FPGA. Control strategies for the MMC and IM are also emulated in hardware, and due to the large latency difference between subcircuits and controllers, the overall system hardware design is divided into several layers, each having an independent time step ranging from 500 ns to 4 µs so as to attain the goal of real-time execution. A comparison of transient and steady-state results from the HIL emulation and offline simulation tools shows high accuracy of the modeling approach as well as the efficacy of proposed multiple time steps in achieving real time.