A low sampling clock, high bandwidth, master‐slave track and hold amplifier

Abstract

A fully-differential master-slave track and hold amplifier (MSTHA), with one-input, four-output and nearly 20 GHz bandwidth is designed and fabricated in 0.13-μm SiGe BiCMOS technology. Operating with a single +3.3 V supply, 0 V input directvoltage, 2 GHz sampling clock input and 5 dBm input power, the MSTHA achieves a spurious free dynamic range (SFDR) of less than −31 dB up to 20 GHz, 0.5 mV rms output noise amplitude (RMS, root of mean square) and totally power consumingbandwidth, master-slave, MSTHA, SFDR, SiGe BiCMOS