A low‐power four‐stage amplifier for driving large capacitive loads

Abstract

A four-stage amplifier with a new and efficient frequency compensation topology is presented in this paper. The new compensation scheme applies a Miller capacitor as the main negative feedback, a resistor and a capacitor in series as a load for one of the intermediate stages, and two feedforward paths. In order to design the amplifier and acquire circuit parameters, small signal analyses have been carried out to derive the signal transfer function and the pole-zero locations. The proposed amplifier was designed and implemented in a standard 90 nm CMOS process with two heavy capacitive loads of 500 pF and 1 nF. The simulation results show that when driving a 500 pF load, the amplifier has a gain-bandwidth product of 18 MHz consuming only 40.9 mW. With a 1 nF capacitive load, the proposed amplifier achieves 15.1 MHz gain-bandwidth product and dissipates 55.2 mW from a single 0.9 V power supply.

High-performance frequency compensation topology for four-stage OTAs

“…To compare the proposed compensation technique with prior art, we can use two figures of merit commonly adopted: FOM S =(GBW·C L )/Power and FOM L =(SR·C L )/Power [2]- [16], [20]- [21] where SR is the slew rate and Power is the dc power consumption. The higher is the value of both FOM S and FOM L the better is the amplifier.…”

“…Nevertheless, the design of such amplifiers is a challenging task since the increased number of high impedance nodes (and, in turn, of low frequency poles and zeroes) may compromise stability. Therefore, in the last decades frequency compensation strategies for three-stage [1]- [17] and four-stage amplifiers [17]- [21] have been extensively investigated.…”

“…The only topology showing comparable values of the figure of merits is that reported in [21] which, however, is more complex since entails an additional feedforward stage in the compensation network.…”

Symbolic factorization methodology for multistage amplifier transfer functions

“…The well‐known pole‐splitting technique firstly reported in Millman and Grabel and Gray et al . is usually applied to analyze two‐stage OTAs and three‐stage OTAs with nested Miller compensation , , .…”

“…While cascode and telescopic topologies allow reaching high DC gain values, they are not preferable because they suffer from small output swing limitations, especially under a low voltage supply. In this framework, multistage amplifiers (mainly three-stage OTAs) have become increasingly exploited because they can provide DC gains in excess of 80 dB and large output swings with low overdrive voltages [1][2][3][4][5][6][7][8][9][10][11][12][13][14][15]. However, as additional gain stages are cascaded, bandwidth is progressively reduced, as each stage inevitably introduces high-frequency poles and zeroes and, more importantly, requires additional compensation capacitors to avoid compromising stability.…”