2013 IEEE International Symposium on Circuits and Systems (ISCAS2013) 2013
DOI: 10.1109/iscas.2013.6572310
|View full text |Cite
|
Sign up to set email alerts
|

A low-power area-efficient compressive sensing approach for multi-channel neural recording

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
3
1
1

Citation Types

0
6
1

Year Published

2014
2014
2023
2023

Publication Types

Select...
4
3

Relationship

0
7

Authors

Journals

citations
Cited by 11 publications
(7 citation statements)
references
References 8 publications
0
6
1
Order By: Relevance
“…As shown in Figure 14, a CS encoder can be implemented in both an analog and a digital domain. Figure 14a demonstrates the block diagram of an analog implementation of a CS encoder presented in [72,94,105,106]. The sparsity of the EEG signal in the Gabor domain is utilized in [94] and the design in [72,105,106] exploits the spatial sparsity of the iEEG signals recorded from the electrodes of the sensor array.…”
Section: Data Compressionmentioning
confidence: 99%
“…As shown in Figure 14, a CS encoder can be implemented in both an analog and a digital domain. Figure 14a demonstrates the block diagram of an analog implementation of a CS encoder presented in [72,94,105,106]. The sparsity of the EEG signal in the Gabor domain is utilized in [94] and the design in [72,105,106] exploits the spatial sparsity of the iEEG signals recorded from the electrodes of the sensor array.…”
Section: Data Compressionmentioning
confidence: 99%
“…We note that biologists are particularly interested in the frequency of the EOD signal. Hence unlike other CS applications which record analog signals [6]- [8], in the EOD sensing system we record the time domain frequency data. Similar to EMG waveforms [7], the EOD waveform is also sparse in both time and frequency domain.…”
Section: Compressed Sensing Backgroundmentioning
confidence: 99%
“…Although CS encoders have been proposed previously [ 28 , 29 , 30 , 31 , 32 , 33 , 34 , 35 ], the hardware cost of a matrix-vector multiplier for CS encoder is not small enough for multi-channel neural recording devices, and thus, the reduction of hardware cost is an essential issue. The hardware cost depends on the CS encoder architecture, which can be classified into temporal CS [ 28 , 31 , 32 ] and spatial CS [ 33 , 34 , 35 ]. The temporal CS, especially by a digital implementation, has an advantage in terms of energy efficiency in high-resolution measurement [ 28 ].…”
Section: Introductionmentioning
confidence: 99%
“…However, for multichannel measurement using the temporal CS approach, the digital product-sum operation circuit has to be parallelized for each measurement channel, increasing chip area per measurement channel. In the spatial CS [ 33 , 34 , 35 ], on the other hand, the product-sum operation circuit can be shared with a plurality of channels. Thus, it is suitable for realizing multiple-channel measurement systems.…”
Section: Introductionmentioning
confidence: 99%
See 1 more Smart Citation