A Low Parasitic Capacitance Scheme by Thermally Stable Titanium Silicide Technology for High Speed CMOS

Yoshida, Takehiro; Ogawa, Satoshi; Miyajima, Akio; Yano, Kousaku

doi:10.7567/ssdm.1993.pc-1-20

Extended Abstracts of the 1993 International Conference on Solid State Devices and Materials 1993

DOI: 10.7567/ssdm.1993.pc-1-20

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A Low Parasitic Capacitance Scheme by Thermally Stable Titanium Silicide Technology for High Speed CMOS

Takehiro Yoshida¹,

Satoshi Ogawa²,

Akio Miyajima³

et al.

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A Low Parasitic Capacitance Scheme by Thermally Stable Titanium Silicide Technology for High Speed CMOS

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