A low-overhead self-healing embedded system for ensuring high yield and long-term sustainability of 60GHz 4Gb/s radio-on-a-chip

A programmable calibration/BIST engine for RF/analog blocks in SoCs

“…As all algorithms running on CaT-engine reuse the same microprocessor, signal generator and powerful reconfigurable data path (Table I), no hardware blocks customized towards individual tests are required. This is in sharp contrast with the state-of-the-art [3,5,6,7], resulting in superior versatility towards a variety of compute intensive on-and off-line calibrations as well as to future needs. The presented CaT engine is hence the first to enable affordable, independent, on-chip execution of compute intensive calibration and test, opening up a new era for robust and portable radios on SoCs with better tolerance against technology variations, cheaper manufacturing tests and in-the-field monitoring and calibration capabilities.…”

“…The current approach, to include dedicated calibration logic [3], or to push out calibrations to manufacture testing time [4], is unendurable in the future due to SoC complexity and test cost increase. On the other hand, recently proposed, programmable built-in-self test (BIST) solutions either suffer from insufficient compute power to execute advanced algorithms [5,6], or lack flexibility by relying on the baseband processor [7]. By assessing common kernels in these calibration and test algorithms and exploiting digital cost scaling through Moore's law, a revolutionary change in the design of digital self-test and self-calibration structures is presented here.…”

CMOS mm-wave transceiver techniques beyond 50 GHz

“…They also contain a virtual ground plane down the center of the amplifier making them excellent candidates for digital control. In [5,6] we accomplish DC control by using an R2R DAC connected to the center of each transformer network as shown in Fig. 4 along with a corresponding control GUI.…”

“…While this control scheme provides many actuators and enables control of each amplifier stage, feedback is needed in order to construct a control algorithm for optimization. In [6], a simple rectification-based power sensor (shown in Fig 5) was combined with an instrument ADC, and was coupled to the end of a transformer power amplifier to provide power level feedback to a control ASIC. Using this sensor-control configuration the amplifier output power can be directly optimized either by a binary-search of the front-end control code-words, or even an exhaustive search (usually limited by the power sensor's settling time).…”

A Programmable Calibration/BIST Engine for RF and Analog Blocks in SoCs Integrated in a 32 nm CMOS WiFi Transceiver

“…However, this implies a strict limitation of localized time slots for the algorithms execution during idle times of the engine, as well as an inefficient data path and instruction set for this type of operations. A third existing approach is the integration of a small dedicated test controller within the transceiver [7], [8]. Although this solution offers improved flexibility, it lacks required computational power to perform some of the more complex calibration algorithms, e.g.…”