A low noise programmable clock multiplier based on a pulse injection-locked oscillator with a highly-digital tuning loop

Abstract

This paper introduces a pulse injectionlocked oscillator (PILO) that provides low jitter clock multiplication of a clean input reference clock. A mostlydigital feedback circuit provides continuous tuning of the oscillator such that its natural frequency is locked to the injected frequency. The prototype uses a 50 MHz reference input to generate a 3.2 GHz output with integrated phase noise, reference spur, and estimated deterministic jitter of 134 fs (rms), -63.4 dBc, and 211 fs (peak-to-peak), respectively.

A Low Jitter Programmable Clock Multiplier Based on a Pulse Injection-Locked Oscillator With a Highly-Digital Tuning Loop

“…In this paper, we will present a subharmonic injection locked clock multiplier that addresses each of the above issues [8]. In 0018-9200/$25.00 © 2009 IEEE particular, we will show that you can achieve continuous tuning of the LC oscillator while it is being injected so that its natural frequency, , continuously tracks the desired harmonic, .…”

Design of phase locked loop with PVT tolerance

“…The average current charging or discharging the capacitor is given by With these observations, it is obvious that the current mismatch should be reduced as much as possible. The deterministic jitter, Δ det , can be estimated from the reference spur based on Fourier series analysis [25][26] and is given by an expression…”

“…25 shows the VCO frequency with respect to control voltage range of 0.4V ~1.4V, for the control resistor varying from 1kΩ to 10kΩ. Though a bit saturated at the largest current for a control resistor value of 1kΩ, this behavior gives rise to the possibility of using the VCO for an extra extended frequency range of 1GHz to 6GHz, if required.…”