A low-cost and high efficiency entropy encoder architecture for H.264/AVC

Thiele, Cristiano; Vizzotto, Bruno Boessio; Martins, André Leibsohn; Rosa, Vagner Santos da; Bampi, Sérgio

doi:10.1109/vlsi-soc.2012.7332087

Cited by 3 publications

(2 citation statements)

References 9 publications

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“…The memory cost of our design is also very promising, thanks to the optimized VLC LUTs and the arithmetic table elimination techniques. Table VII summarizes the specification of the suggested Exp-Golomb encoder and gives a comparison with the work presented in [10] and [13]. The operating frequency of the proposed architecture is lower than those presented in [10], but the suggested design has a lower area demand.…”

Section: B State-of-the-art Comparisonmentioning

confidence: 99%

“…Table VII summarizes the specification of the suggested Exp-Golomb encoder and gives a comparison with the work presented in [10] and [13]. The operating frequency of the proposed architecture is lower than those presented in [10], but the suggested design has a lower area demand. Compared to the design shown in [13], the proposed architecture employs a higher area demand and a higher operating frequency.…”

Section: B State-of-the-art Comparisonmentioning

confidence: 99%

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Real-Time H.264/AVC Entropy Encoder Hardware Architecture in Baseline Profile

Asma¹,

Dhahri²,

Zitouni³

2017

ijacsa

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Abstract-In this paper, we present a new hardware architecture of an entropy encoder for an H.264/AVC video encoder. The proposed design aims to employ a parallel module at a pre-encoding stage to reduce a critical path. Additionally, the arithmetic table elimination method is used to eliminate the memory cost. Besides, the reduction in the size of VLC tables offers area saving. This architecture is synthesized on an FPGA Virtex IV. The simulation results show that this design can operate up to 234 MHz, which allows processing a 4CIF video format in real time.

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Section: B State-of-the-art Comparisonmentioning

confidence: 99%