A Lightweight FPGA-based IDS-ECU Architecture for Automotive CAN

Abstract

Recent years have seen an exponential rise in complex software-driven functionality in vehicles, leading to a rising number of electronic control units (ECUs), network capabilities, and interfaces. These expanded capabilities also bring-in new planes of vulnerabilities making intrusion detection and management a critical capability; however, this can often result in more ECUs and network elements due to the high computational overheads. In this paper, we present a consolidated ECU architecture incorporating an Intrusion Detection System (IDS) for Automotive Controller Area Network (CAN) along with traditional ECU functionality on an off-the-shelf hybrid FPGA device, with near-zero overhead for the ECU functionality. We propose two quantised multi-layer perceptrons (QMLP's) as isolated IDSs for detecting a range of attack vectors including Denial-of-Service, Fuzzing and Spoofing, which are accelerated using off-the-shelf deep-learning processing unit (DPU) IP block from Xilinx, operating fully transparently to the software on the ECU. The proposed models achieve the state-of-the-art classification accuracy for all the attacks, while we observed a 15× reduction in power consumption when compared against the GPU-based implementation of the same models quantised using Nvidia libraries. We also achieved a 2.3× speed up in permessage processing latency (at 0.24 ms from the arrival of a CAN message) to meet the strict end-to-end latency on critical CAN nodes and a 2.6× reduction in power consumption for inference when compared to the state-of-the-art IDS models on embedded IDS and loosely coupled IDS accelerators (GPUs) discussed in the literature.

Exploring Highly Quantised Neural Networks for Intrusion Detection in Automotive CAN

“…The 2-bit CQMLP also achieves almost perfect classification for the RPM-spoofing attack and performs better than or equal to the other methods proposed in the literature. Our prior work using two 8-bit variants of the feed-forward model achieved 99.96%, 99.76% & 100% F1 scores for the DoS, Fuzzing, and RPM spoofing attacks, when deployed as two concurrent accelerators for detecting them simultaneously [18]. In contrast, our 2-bit CQMLP variant achieves almost identical F1 scores (99.90%, 99.81% & 99.98% respectively) for the same attacks (from the same dataset) while performing multi-class classification using a single inference model.…”

“…This integration allows us to model the Zynq-based hybrid ECU architecture, where our custom hardware is accessible from the ECU and performs IDS in complete isolation from the tasks on the ARM cores as shown in Figure 5. We build on the proposed architecture from our previous works which contain detailed information of the same [18], [44]. For our experiments, we use the PYNQ runtime on top of a Linux kernel on the ARM cores to interact with our hardware model on the PL.…”

“…In contrast, our 2-bit CQMLP variant achieves almost identical F1 scores (99.90%, 99.81% & 99.98% respectively) for the same attacks (from the same dataset) while performing multi-class classification using a single inference model. By adopting QAT training and conservative block-based labelling, our low precision model is able to match the inference performance of the MLP variant at 8-bit quantisation discussed in [18].…”

“…GRU [34] 890 ms 5000 CAN frames Jetson Xavier NX MLIDS [36] 275 ms per CAN frame GTX Titan X Rec-CNN [38] 117 ms 128 CAN frames Jetson TX2 NovelADS [32] 128.7 ms 100 CAN frames Jetson Nano GIDS [30] 5.89 ms 64 CAN frames GTX 1080 TAN-IDS [29] 11.6 ms 128 CAN frames -DCNN [13] 5 ms 29 CAN frames Tesla K80 TCAN-IDS [31] 3.4 ms 64 CAN frames Jetson AGX MTH-IDS [37] 0.574 ms per CAN frame Raspberry Pi 3 QMLP-IDS [18] 0.24 ms per CAN frame Zynq Ultrascale+ CQMLP-IDS 0.11 ms per CAN frame Zynq Ultrascale+ 2.18× improvement over the dedicated line-rate QMLP-IDS ECU proposed in [18]. We also observe the inference latency of the (fp32) model on the Jetson Nano (modeling a dedicated IDS ECU) to be 1.2 ms when averaged over 10000 runs.…”

“…Frameworks such as Vitis-AI and FINN can convert the Pytorch/TensorFlow representations at native precisions to quantised models and dataflow-style hardware accelerators for deployment on the FPGA [16], [17]. ECU architectures based on hybrid FPGAs are a promising platform for the deployment of such QNNs as IDS, while also enabling consolidation with standard ECU function(s), with clear isolation between them on the same die [18]. However, most methods so far relied on the integration of multiple accelerators, each fine-tuned to detect a subset of attacks, increasing the energy cost and area overhead.…”